1
Features
• In dep endent m ult ipl e c hannel s of echo
c anc ell ati o n; from 16 channels o f 64ms t o 8
channe ls of 128ms with th e ability to mix
c han ne ls at 128ms o r 64 ms i n an y co m bi na ti on
• Independent Power Down mode for each group of
2 chann els f o r power manag em en t
• Ful ly com pli an t to ITU -T G.1 65, G.1 68 (200 0) and
(2 00 2) specifi ca ti ons
• Pas sed AT&T voic e q uali ty testing for ca rri er
gr ad e echo c an cel lers.
• Compatible to ST-BUS and G CI interfa ces with
2Mb/s serial PCM data
• PCM c oding, µ/A-Law I TU -T G.711 or si g n
magnitude
• Per c hannel F ax / Mo de m G.164 2 100 Hz or G.165
2100Hz phase reversal Tone Disable
• Per c han nel ech o ca nceller para me t ers control
• Tra nsparen t dat a transfe r an d m ut e
• Fast re conve rge nce on ec h o path changes
• Ful ly progra m ma bl e converg en ce spee ds
• Pat e nt ed Ad vance d N on-Line ar Proce sso r wit h
high quality subjective performance
• Protection against narrow band signal divergence
and instability in high echo environments
• 0 dB to -12 dB l eve l adju s ters (3 dB steps) at a ll
signal ports
• Offset nulling of all PCM chan nels
• 10 MH z o r 20 M H z m aster clo ck o peration
• 3.3 V IO pads and 1. 8 V L ogi c cor e operation wi th
5-Volt tole rant inputs
• IEEE-114 9.1 (JTAG) Test Access P ort
• ZL50232 , ZL5 0233, Z L5 0234 and ZL5 02 35 h ave
same pi no ut s in b ot h L QF P a nd LBGA packages
Applicat ions
• Vo ice over IP ne twork ga teway s
• Voice o ver ATM, Frame Rela y
• T1/ E1 / J1 m ult ichannel e cho ca nce l lati on
• Wir eless base stations
• Echo Canceller po ol s
• DCME, satellite and multiplexer system
Ma r ch 2003
Ordering Information
ZL50235/QCC 100-Pin LQFP
ZL50235/GDC 208-Ball LBGA
-40°C to +85°C
ZL50235
16 Channel Voice Echo Canceller
Data Sheet
Figure 1 - ZL50235 Device O verview
RESET
Rout
Sout
DS CS R/W A10-A0 DTA D7-D0
V
SS
V
DD1 (3.3V)
TDI TDO TCK TRSTTMS
Rin
IRQ
C4i
F0i
MCLK
ODE
Sin
Fsel
Test PortMicroprocessor Interface
Timing
Unit
Serial
to
Para llel
Para llel
to
Serial
PLL
Note:
R e fe r to Fi gure 4
for Echo Canceller
block diagram
V
DD2 (1.8V)
Echo Canceller Pool
Group 0
ECA/ECB
Group 4
ECA/ECB
Group 1
ECA/ECB
Group 5
ECA/ECB
Group 2
ECA/ECB
Group 6
ECA/ECB
Group 3
ECA/ECB
Group 7
ECA/ECB
