96 S29WS128J/064J S29WS-J_00_A6 May 11, 2006
Data Sheet
Revision Summary
Revision A0 (July 22, 2004)
Initial release.
Revision A1 (October 6, 2004)
Add ‘BF’ parts on Valid Combination table.
Revision A2 (December 10, 2004)
Remove all in terms of 104MHz speed bin.
Change statement of command during time-out period of sector erase.
Change exit command statement about password program command
Change exit command statement about password protection mode locking bit program command
Change exit command statement about persistentsector protection mode locking bit program
command
Change exit command statement about Secured Silicon sector protection bit program command
Change exit command statement about PPB program command
Change exit command statement about All PPB erase command
Change exit command statement about PPB/PPB lock bit status command
Change PPB command table.
Remove note 19 in command table.
Change waveform about boundary crossing.
Remove DC spec output disable status in synchronous read mode.
Change the word from SMPL to PL , from OPBP to OW.
Change the statement PPB Lock Bit Set Command.
Delete V
IO
pin
Added description at “RDY Configuration” in page56
Modified t
AH
in Asynchronous mode to 20ns in page89
Revision A3 (February 19, 2005)
Change "Secsi" to "Secured Silicon"
Add migration statement.
Modify "Sync Latency", "Asyn Access time" @80MHz
Update "Product Selector Guide" on tACC, tCE, tIACC@80MHz
Modify Table 15( "Wait States for Standard Wait-state Handshaking")
Change "Supply Voltage" to "1.70V to 1.95V for 80MHz parts
Modify "CLK Characterization" table
Revision A4 (June 24, 2005)
Added information for "Revision 1" for boundary crossing while in Continuous read mode
Removed all references to WS128J 80 MHz and WS064J Industrial grades
Revision A5 (March 31, 2006)
Updated the Valid Combinations table for the 128 Mb device
