May 11, 2006 S29WS-J_00_A6 S29WS128J/064J 93
Data Sheet
Erase and Programming Performance
Notes:
1. Typical program and erase times assume the following conditions: 25°C, 1.8 V V
CC
, 100K cycles. Additionally,
programming typicals assumes a checkerboard pattern.
2. Under worst case conditions of 90°C, V
CC
= 1.65 V, 1,000,000 cycles.
3. The typical chip programming time is considerably less than the maximum chip programming time listed.
4. In the pre-programming step of the Embedded Erase algorithm, all words are programmed to 00h before erasure.
5. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command.
See Table 18, “Command Definitions,” on page 60 for further information on command definitions.
6. The device has a minimum erase and program cycle endurance of 100,000 cycles.
Parameter
Ty p (Note 1) Max (Note 2) Unit Comments
Sector Erase Time
32 Kword <0.4 <2
s
Excludes 00h programming
prior to erasure
(Note 4)
4 Kword <0.2 <2
Chip Erase Time
128J <103
s
064J <53
Word Programming Time <6 <100 µs
Excludes system level
overhead
(Note 5)
Accelerated Word Programming Time <4 <67 µs
Chip Programming Time
(Note 3)
128J <50.4
s
Excludes system level
overhead (Note 5)
064J <25.2
Accelerated Chip
Programming Time
128J <33
s
064J <17
