May 11, 2006 S29WS-J_00_A6 S29WS128J/064J 89
Data Sheet
Note: For sector protect, A6 = 0, A1 = 1, A0 = 0. For sector unprotect, A6 = 1, A1 = 1, A0 = 0.
Figure 34. Sector/Sector Block Protect and Unprotect Timing Diagram
Notes:
1. RDY active with data (A18 = 0 in the Configuration Register).
2. RDY active one clock cycle before data (A18 = 1 in the Configuration Register).
3. Cxx indicates the clock that triggers Dxx on the outputs; for example, C60 triggers D60. Figure shows the device not
crossing a bank in the process of performing an erase or program.
4. If the starting address latched in is either 3Eh or 3Fh (or some 64 multiple of either), there is no additional 2 cycle latency
at the boundary crossing.
Figure 35. Latency with Boundary Crossing
Sector Protect: 150 µs
Sector Unprotect: 1.5 ms
1 µs
RESET#
SA, A6,
A1, A0
Data
CE#
WE#
OE#
60h 60h 40h
Valid* Valid* Valid*
Status
Sector Protect/Unprotect Verify
V
ID
V
IH
CLK
Address (hex)
C60 C61 C62 C63 C63 C63 C63 C64 C65 C66
D60 D61 D62 D63 D63 D64 D65 D66
(stays high)
AVD#
RDY(1)
Data
OE#,
CE#f
(stays low)
Address boundary occurs every 64 words, beginning at address
00003Fh: 00007Fh, 0000BFh, etc.) Address 000000h is also a boundary crossing.
3C 3D 3E 3F 3F 3F 3F 40 41 42
latency
RDY(2)
latency
t
RACC
t
RACC
t
RACC
t
RACC