May 11, 2006 S29WS-J_00_A6 S29WS128J/064J 3
Data Sheet
The hardware RESET# pin terminates any operation in progress and resets the internal state
machine to reading array data. The RESET# pin may be tied to the system reset circuitry. A sys
-
tem reset would thus also reset the device, enabling the system microprocessor to read boot-up
firmware from the Flash memory device.
The host system can detect whether a program or erase operation is complete by using the device
status bit DQ7 (Data# Polling) and DQ6/DQ2 (toggle bits). After a program or erase cycle has
been completed, the device automatically returns to reading array data.
The sector erase architecture allows memory sectors to be erased and reprogrammed without
affecting the data contents of other sectors. The device is fully erased when shipped from the
factory.
Hardware data protection measures include a low V
CC
detector that automatically inhibits write
operations during power transitions. The device also offers two types of data protection at the
sector level. When at V
IL
, WP# locks the four outermost boot sectors.
The device offers two power-saving features. When addresses have been stable for a specified
amount of time, the device enters the automatic sleep mode. The system can also place the
device into the standby mode. Power consumption is greatly reduced in both modes.
Spansion™ Flash memory products combine years of Flash memory manufacturing experience to
produce the highest levels of quality, reliability and cost effectiveness. The device electrically
erases all bits within a sector simultaneously via Fowler-Nordheim tunnelling. The data is pro
-
grammed using hot electron injection.