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WEDPN16M72V-125B2C

WEDPN16M72V-125B2C首页预览图
型号: WEDPN16M72V-125B2C
PDF文件:
  • WEDPN16M72V-125B2C PDF文件
  • WEDPN16M72V-125B2C PDF在线浏览
功能描述: 16Mx72 Synchronous DRAM
PDF文件大小: 442.21 Kbytes
PDF页数: 共14页
制造商: WEDC[White Electronic Designs Corporation]
制造商LOGO: WEDC[White Electronic Designs Corporation] LOGO
制造商网址: http://www.whiteedc.com
捡单宝WEDPN16M72V-125B2C
PDF页面索引
120%
White Electronic Designs
February 2005
Rev. 3
WEDPN16M72V-XB2X
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
FIGURE 3 – MODE REGISTER DEFINITION
M3 = 0
1
2
4
8
Reserved
Reserved
Reserved
Full Page
M3 = 1
1
2
4
8
Reserved
Reserved
Reserved
Reserved
Operating Mode
Standard Operation
All other states reserved
0
-
0
-
Defined
-
0
1
Burst Type
Sequential
Interleaved
CAS Latency
Reserved
Reserved
2
3
Reserved
Reserved
Reserved
Reserved
Burst Length
M0
0
1
0
1
0
1
0
1
Burst LengthCAS Latency BT
A9
A7
A6 A5 A4
A3
A8
A2
A1
A0
Mode Register (Mx)
Address Bus
M1
0
0
1
1
0
0
1
1
M2
0
0
0
0
1
1
1
1
M3
M4
0
1
0
1
0
1
0
1
M5
0
0
1
1
0
0
1
1
M6
0
0
0
0
1
1
1
1
M6-M0
M8
M7
Op Mode
A10
A11
Reserved*
WB
0
1
Write Burst Mode
Programmed Burst Length
Single Location Access
M9
*Should program
M12, M11, M10 = 0, 0
to ensure compatibility
with future devices.
Unused
A12
the burst length is set to four; and by A3-8 when the burst
length is set to eight. The remaining (least signifi cant)
address bit(s) is (are) used to select the starting location
within the block. Full-page bursts wrap within the page if
the boundary is reached.
TABLE 1 – BURST DEFINITION
NOTES:
1. For full-page accesses: y = 512.
2. For a burst length of two, A1-8 select the block-of-two burst; A0 selects the starting
column within the block.
3. For a burst length of four, A2-8 select the block-of-four burst; A0-1 select the starting
column within the block.
4. For a burst length of eight, A3-8 select the block-of-eight burst; A0-2 select the
starting column within the block.
5. For a full-page burst, the full row is selected and A0-8 select the starting column.
6. Whenever a boundary of the block is reached within a given sequence above, the
following access wraps within the block.
7. For a burst length of one, A0-8 select the unique column to be accessed, and Mode
Register bit M3 is ignored.
Burst
Length
Starting Column
Address
Order of Accesses Within a Burst
Type = Sequential Type = Interleaved
2
A0
0 0-1 0-1
1 1-0 1-0
4
A1 A0
0 0 0-1-2-3 0-1-2-3
0 1 1-2-3-0 1-0-3-2
1 0 2-3-0-1 2-3-0-1
1 1 3-0-1-2 3-2-1-0
8
A2 A1 A0
0 0 0 0-1-2-3-4-5-6-7 0-1-2-3-4-5-6-7
0 0 1 1-2-3-4-5-6-7-0 1-0-3-2-5-4-7-6
0 1 0 2-3-4-5-6-7-0-1 2-3-0-1-6-7-4-5
0 1 1 3-4-5-6-7-0-1-2 3-2-1-0-7-6-5-4
1 0 0 4-5-6-7-0-1-2-3 4-5-6-7-0-1-2-3
1 0 1 5-6-7-0-1-2-3-4 5-4-7-6-1-0-3-2
1 1 0 6-7-0-1-2-3-4-5 6-7-4-5-2-3-0-1
1 1 1 7-0-1-2-3-4-5-6 7-6-5-4-3-2-1-0
Full
Page
(y)
n = A0-9/8/7
(location 0-y)
Cn, Cn + 1, Cn + 2
Cn + 3, Cn + 4...
…Cn - 1,
Cn…
Not Supported
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