White Electronic Designs
February 2005
Rev. 3
WEDPN16M72V-XB2X
10
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CHARACTERISTICS
(NOTES 5, 6, 8, 9, 11)
Parameter Symbol
-100 -125 -133
UnitMin Max Min Max Min Max
Access time from CLK (pos. edge)
CL = 3 t
AC
7 6 5.5 ns
CL = 2 t
AC
766ns
Address hold time t
AH
1 1 0.8 ns
Address setup time t
AS
221.5ns
CLK high-level width t
CH
332.5ns
CLK low-level width t
CL
332.5ns
Clock cycle time (22)
CL = 3 t
CK
10 8 7.5 ns
CL = 2 t
CK
13 10 10 ns
CKE hold time t
CKH
1 1 0.8 ns
CKE setup time t
CKS
221.5ns
CS#, RAS#, CAS#, WE#, DQM hold time t
CMH
1 1 0.8 ns
CS#, RAS#, CAS#, WE#, DQM setup time t
CMS
221.5ns
Data-in hold time t
DH
1 1 0.8 ns
Data-in setup time t
DS
221.5ns
Data-out high-impedance time
CL = 3 (10) t
HZ
7 6 5.5 ns
CL = 2 (10) t
HZ
7 6 6 ns
Data-out low-impedance time t
LZ
1 1 1 ns
Data-out hold time (load) t
OH
3 3 3 ns
Data-out hold time (no load) (26) t
OH
N
1.8 1.8 1.8 ns
ACTIVE to PRECHARGE command t
RAS
50 120,000 50 120,000 50 120,000 ns
ACTIVE to ACTIVE command period t
RC
70 68 68 ns
ACTIVE to READ or WRITE delay t
RCD
20 20 20 ns
Refresh period (8,192 rows) – Commercial, Industrial t
REF
64 64 64 ms
Refresh period (8,192 rows) – Military t
REF
16 16 16 ms
AUTO REFRESH period t
RFC
70 70 70 ns
PRECHARGE command period t
RP
20 20 20 ns
ACTIVE bank A to ACTIVE bank B command t
RRD
20 20 20 ns
Transition time (7) t
T
0.3 1.2 0.3 1.2 0.3 1.2 ns
WRITE recovery time
(23)
t
WR
1 CLK +
7ns
1 CLK +
7ns
1 CLK +
7.5ns
—
(24) 15 15 15 ns
Exit SELF REFRESH to ACTIVE command t
XSR
80 80 75 ns
