W9412G6CH
Publication Release Date: Jul. 04, 2007
- 41 - Revision A06
11.6 Mode Register Set (MRS) Timing
MRS
Register Set data
NEXT CMD
tMRD
CLK
CLK
CMD
ADD
A2 A1 A0
A3
A6 A5 A4
A8
BS1 BS0
000
000
001
010
011
100
101
110
111
001
010
011
100
101
110
111
0
1
0
1
1
1
0
0
0
1
0
1
2
4
8
2
4
8
Burst Length
Sequential Interleaved
Reserved Reserved
Reserved
Reserved
Reserved
Reserved
Sequential
Interleaved
Addressing Mode
CAS Latency
2
DLL Reset
No
Yes
MRS or EMRS
Regular MRS cycle
Extended MRS cycle
2.5
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
BS0
BS1 "0"
"0"
"0"
"0"
"0"
"0"
DLL Reset
Reserved
Addressing Mode
* "Reserved" should stay "0" during MRS cycle.
Reserved
Mode Register Set
or
Extended Mode
Register Set
CAS Latency
Burst Length
Reserved Reserved
3
