• 当前位置:
  • 首页
  • >
  • PDF资料
  • >
  • W9412G6CH PDF文件及第2页内容在线浏览

W9412G6CH

W9412G6CH首页预览图
型号: W9412G6CH
PDF文件:
  • W9412G6CH PDF文件
  • W9412G6CH PDF在线浏览
功能描述: 2M × 4 BANKS × 16 BITS DDR SDRAM
PDF文件大小: 1636.45 Kbytes
PDF页数: 共55页
制造商: WINBOND[Winbond]
制造商LOGO: WINBOND[Winbond] LOGO
制造商网址: http://www.winbond.com
捡单宝W9412G6CH
PDF页面索引
120%
W9412G6CH
Publication Release Date:Jul. 04, 2007
- 2 - Revision A06
7.9.2 Addressing Mode Select (A3).........................................................................................14
7.9.3 CAS Latency field (A6 to A4)..........................................................................................16
7.9.4 DLL Reset bit (A8) ..........................................................................................................16
7.9.5 Mode Register/Extended Mode register change bits (BS0, BS1) ...................................16
7.9.6 Extended Mode Register field ........................................................................................17
7.9.7 Reserved field ................................................................................................................17
8. OPERATION MODE ...................................................................................................................... 18
8.1 Simplified Truth Table ......................................................................................................... 18
8.2 Function Truth Table ........................................................................................................... 19
8.3 Function Truth Table for CKE.............................................................................................. 22
8.4 Simplified Stated Diagram................................................................................................... 23
9. ELECTRICAL CHARACTERISTICS.............................................................................................. 24
9.1 Absolute Maximum Ratings................................................................................................. 24
9.2 Recommended DC Operating Conditions........................................................................... 24
9.3 Capacitance......................................................................................................................... 25
9.4 Leakage and Output Buffer Characteristics ........................................................................ 25
9.5 DC Characteristics............................................................................................................... 26
9.6 AC Characteristics and Operating Condition ...................................................................... 27
9.7 AC Test Conditions.............................................................................................................. 29
10. SYSTEM CHARACTERISTICS FOR DDR SDRAM...................................................................... 32
10.1 Table 1: Input Slew Rate for DQ, DQS, and DM................................................................. 32
10.2 Table 2: Input Setup & Hold Time Derating for Slew Rate.................................................. 32
10.3 Table 3: Input/Output Setup & Hold Time Derating for Slew Rate...................................... 32
10.4 Table 4: Input/Output Setup & Hold Derating for Rise/Fall Delta Slew Rate ...................... 32
10.5 Table 5: Output Slew Rate Characteristics (X16 Devices only).......................................... 32
10.6 Table 6: Output Slew Rate Matching Ratio Characteristics ................................................ 33
10.7 Table 7: AC Overshoot/Undershoot Specification for Address and Control Pins ............... 33
10.8 Table 8: Overshoot/Undershoot Specification for Data, Strobe, and Mask Pins ................ 34
10.9 System Notes: ..................................................................................................................... 35
11. TIMING WAVEFORMS .................................................................................................................. 37
11.1 Command Input Timing ....................................................................................................... 37
11.2 Timing of the CLK Signals................................................................................................... 37
11.3 Read Timing (Burst Length = 4) .......................................................................................... 38
11.4 Write Timing (Burst Length = 4) .......................................................................................... 39
11.5 DM, DATA MASK (W9412G6CH) ....................................................................................... 40
11.6 Mode Register Set (MRS) Timing ....................................................................................... 41
购买、咨询产品请填写询价信息:(3分钟左右您将得到回复)
询价型号*数量*批号封装品牌其它要求
删除
删除
删除
删除
删除
增加行数
  •  公司名:
  • *联系人:
  • *邮箱:
  • *电话:
  •  QQ:
  •  微信:

  • 关注官方微信

  • 联系我们
  • 电话:13714778017
  • 周一至周六:9:00-:18:00
  • 在线客服:

天天IC网由深圳市四方好讯科技有限公司独家运营

天天IC网 ( www.ttic.cc ) 版权所有©2014-2023 粤ICP备15059004号

因腾讯功能限制,可能无法唤起QQ临时会话,(点此复制QQ,添加好友),建议您使用TT在线询价。

继续唤起QQ 打开TT询价