W83877TF/W83877TG
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IDENT (Bit 3):
This bit indicates the type of drive being accessed and changes the level on
RWC (pin 87).
0 RWC will be active low for high data rates (typically used for 3.5" drives)
1
RWC will be active high for high data rates (typically used for 5.25" drives)
When hardware reset or ENIFCHG is a logic 1, IDENT and MFM select one of three interface modes,
as shown in Table 11-5.
Table 11-5
IDENT MFM INTERFACE
0 0 Model 30 mode
0 1 PS/2 mode
1 0 AT mode
1 1 AT mode
MFM (Bit 2):
This bit and IDENT select one of the three interface modes (PS/2 mode, Model 30, or PC/AT mode).
INTVERTZ (Bit 1):
This bit determines the polarity of all FDD interface signals.
0 FDD interface signals are active low
1 FDD interface signals are active high
DRV2EN (Bit 0): PS/2 mode only
When this bit is a logic 0, this indicates that a second drive is installed and is reflected in status
register A.
11.2.13 Configuration Register C (CR0C), default = 28H
When the device is in Extended Function mode and EFIR is 0CH, the CR0C register can be accessed
through EFDR. The bit definitions are as follows:
1
2
34567
0
TX2INV
RX2INV
reserved
URIRSEL
reserved
HEFERE
TURB
TURA