W83877TF/W83877TG
Publication Release Date: May 2006
-103- Revision 0.7
TMIN_SEL (Bit 5): Time resolution of the auto power machines of all devices.
CR35 to CR39 store the initial counts of the devices.
0 one second
1 one minute
Bit 4 - bit 2: Reserved, fixed at 0.
SMI_EN (Bit 1): SMI output pin enable.
While an SMI event is raised on the output of the SMI logic, this bit determines whether the SMI
interrupt will be generated on the SMI output
SMI pin and on the Serial IRQ IRQSER pin while in
Serial IRQ mode.
0 disable
1 enable
UPULLEN (Bit 0): Enable the pull up of IRQSER pin in Serial IRQ mode.
0 disable the pull up of IRQSER pin.
1 enable the pull up of IRQSER pin.
11.2.46 Configuration Register 3B (CR3B), default=00H
Reserved for testing. Should be kept all 0's.
11.2.47 Configuration Register 40 (CR40), default=00H
When the device is in Extended Function mode and EFIR is 40H, the CR40 register can be accessed
through EFDR. The bit definitions are as follows:
1
2
34567
0
URBIDLSTS
URAIDLSTS
FDCIDLSTS
PRTIDLSTS
reserved
reserved
reserved
reserved
Bit 7 - bit 4 : Reserved, fixed at 0.
Bit 3 - bit 0 : Devices' idle status.
These bits indicate that the individual device's idle timer expires due to no I/O access, IRQ, and
external input to the device respectively. These 4 bits are controlled by the printer port, FDC, UART A,
and UART B power down machines individually. The bits are set/cleared by W83877TF/TG
automatically. Writing a 1 can also clear this bit, and writing a 0 has no effect.
