W83877TF/W83877TG
Publication Release Date: May 2006
-97- Revision 0.7
CR31[7:4] MAPPED IRQ PIN
0000 None (default)
0001 IRQ_A
0010 IRQ_B
0011 IRQ_C
0100 IRQ_D
0101 IRQ_E
0110 IRQ_F
0111 IRQ_G
1000 IRQ_H
While in the Serial IRQ mode (IRQMODS=1, CR31 bit 2), the above selection is invalid and all the
IRQ signal pins, from IRQ_A to IRQ_H, are all in tri-state. The SCI interrupt output is dedicated to the
SERIRQ pin. For the host controller to correctly sample the SCI interrupt, the SCI interrupt should be
programmed to appear in one of IRQ/Data Frame sampling periods.
In Serial IRQ mode, the definition of SCIIQS3-SCIIQS0 (bit 7-bit 4) is as follows:
SCIIQS3-SCIIQS0 (bit 7-bit 4): Select the IRQ/Data sampling period on the SERIRQ pin.
CR27[7:4] IRQ/DATA FRAME PERIOD
0000 None
0001 IRQ1
0010
Reserved for
SMI
0011 IRQ3
0100 IRQ4
0101 IRQ5
0110 IRQ6
0111 IRQ7
1000 IRQ8
1001 IRQ9
1010 IRQ10
1011 IRQ11
1100 IRQ12
1101 IRQ13
1110 IRQ14
1111 IRQ15
Bit 3: Reserved.