W83877TF/W83877TG
-96 -
DRIVE RATE TABLE DATA RATE OPERATIONAL DATA RATE
DRTA1 DRTA0 DRATE1 DRATE0 MFM FM
0 0 1 1 1M ---
0 0 0 0 500K 250K
0 0 0 1 300K 150K
0 0 1 0 250K 125K
0 1 1 1 1M ---
0 1 0 0 500K 250K
0 1 0 1 500K 250K
0 1 1 0 250K 125K
1 0 1 1 1M ---
1 0 0 0 500K 250K
1 0 0 1 2M ---
1 0 1 0 250K 125K
11.2.36 Configuration Register 31 (CR31), default=00H
When the device is in Extended Function mode and EFIR is 31H, the CR31 register can be accessed
through EFDR. The bit definitions are as follows:
1
2
34567
0
reserved
reserved
IRQMODS
reserved
SCIIRQ0
SCIIRQ1
SCIIRQ2
SCIIRQ3
SCIIRQ3 ~ SCIIRQ0 (Bit 7 - bit 4):
The four bits select one IRQ pin for the SCI signal except for dedicated SCI signal output pin. Any
unselected pin is in tri-state.