W6811
Publication Release Date: October 23, 2003
- 9 - Revision A10
7. FUNCTIONAL DESCRIPTION
W6811 is a single-rail, single channel PCM CODEC for voiceband applications. The CODEC complies
with the specifications of the ITU-T G.712 recommendation. The CODEC also includes a complete µ-
Law and A-Law compander. The µ-Law and A-Law companders are designed to comply with the
specifications of the ITU-T G.711 recommendation.
The block diagram in section 3 shows the main components of the W6811. The chip consists of a
PCM interface, which can process long and short frame sync formats, as well as GCI and IDL formats.
The pre-scaler of the chip provides the internal clock signals and synchronizes the CODEC sample
rate with the external frame sync frequency. The power conditioning block provides the internal power
supply for the digital and the analog section, while the voltage reference block provides a precision
analog ground voltage for the analog signal processing. The main CODEC block diagram is shown in
section 3.
Figure 7.1 The W6811 Signal Path
7.1. TRANSMIT PATH
The A-to-D path of the CODEC contains an analog input amplifier with externally configurable gain
setting (see application examples in section 11). The device has an input operational amplifier whose
output is the input to the encoder section. If the input amplifier is not required for operation it can be
powered down and bypassed. In that case a single ended input signal can be applied to the AO pin or
the AI- pin. The AO pin becomes high input impedance when the input amplifier is powered down. The
input amplifier can be powered down by connecting the AI+ pin to V
DDA
or V
SSA
. The AO pin is
selected as an input when AI+ is tied to V
DDA
and the AI- pin is selected as an input when AI+ is tied to
V
SSA
(see Table 7.1).
PA
+
PA
A -
n
+
-
-
+
-
-
-
=
-
= 2
m
n
Fil
r
H
m
n
Fil
r
-
n
r
l
-
-
-
Fil
m
hin
Fil
r Fil
r
Fil
r Fil
r
Receive Path
Transmit Path
+ -
+
+
-
D
D
A
=
4
Hz
=
4
Hz
=
