W6811
- 8 -
Pin
Name
Pin
No.
V
DD
*
Functionality
V
SSD
17 D This is the digital supply ground. This pin should be connected to 0V.
NC 18 Not Connected
V
SSA
19 A This is the analog supply ground. This pin should be connected to 0V.
µ/A-Law
20 D
Compander mode select pin. µ-Law companding is selected when this pin is
tied to V
DDD
. A-Law companding is selected when this pin is tied to V
SSD
.
AO 21 A Analog output of the first gain stage in the transmit path.
AI- 22 A Inverting input of the first gain stage in the transmit path.
AI+ 23 A Non-inverting input of the first gain stage in the transmit path.
V
AG
24 A Mid-Supply analog ground pin, which supplies a 2.5 Volt reference voltage for
all-analog signal processing. This pin should be decoupled to V
SSA
with a
0.01µF capacitor. This pin becomes high impedance when the chip is
powered down.
* These columns represent whether the pin Is driven by Analog (‘A’) or Digital (‘D’) power supply.