W6811
Publication Release Date: October 23, 2003
- 11 - Revision A10
7.3. POWER MANAGEMENT
7.3.1. Analog Supply
The power supply for the analog part of the W6811 needs to be 5V +/- 10%. This supply voltage is
connected to the V
DDA
pin. The V
DDA
pin needs to be decoupled to ground through a 0.1 µF ceramic
capacitor.
7.3.2. Digital Supply
The power supply for the digital part of the W6811 needs to be 3V +/- 10%. This supply voltage is
connected to the V
DDD
pin. The V
DDD
pin needs to be decoupled to ground through a 0.1 µF ceramic
capacitor.
7.3.3. Analog Ground Reference Bypass
The system has an internal precision voltage reference which generates the 2.5V mid-supply analog
ground voltage. This voltage needs to be decoupled to V
SSA
at the V
REF
pin through a 0.1 µF ceramic
capacitor.
7.3.4. Analog Ground Reference Voltage Output
The analog ground reference voltage is available for external reference at the V
AG
pin. This voltage
needs to be decoupled to V
SSA
through a 0.01 µF ceramic capacitor. The analog ground reference
voltage is generated from the voltage on the V
REF
pin and is also used for the internal signal
processing.
7.4. PCM INTERFACE
The PCM interface is controlled by pins BCLKR, FSR, BCLKT & FST. The input data is received
through the PCMR pin and the output data is transmitted through the PCMT pin. The modes of
operation of the interface are shown in Table 7.3.
BCLKR FSR Interface Mode
64 kHz to 4.096
MHz
8 kHz Long or Short Frame Sync
V
SSD
V
SSD
ISDN GCI with active channel B1
V
SSD
V
DDD
ISDN GCI with active channel B2
V
DDD
V
SSD
ISDN IDL with active channel B1
V
DDD
V
DDD
ISDN IDL with active channel B2
Table 7.3 PCM Interface mode selections
