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W3EG2128M64ETSRXXXJD3MG

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型号: W3EG2128M64ETSRXXXJD3MG
PDF文件:
  • W3EG2128M64ETSRXXXJD3MG PDF文件
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功能描述: 2GB - 2x128Mx64 DDR SDRAM REGISTERED w/PLL
PDF文件大小: 308.16 Kbytes
PDF页数: 共13页
制造商: WEDC[White Electronic Designs Corporation]
制造商LOGO: WEDC[White Electronic Designs Corporation] LOGO
制造商网址: http://www.whiteedc.com
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PDF页面索引
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1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
April 2005
Rev. 0
W3EG2128M64ETSR-JD3
ADVANCED*
2GB – 2x128Mx64 DDR SDRAM REGISTERED w/PLL
DESCRIPTION
The W3EG2128M64ETSR is a 2x128Mx64 Double Data
Rate SDRAM memory module based on1Gb DDR SDRAM
component. The module consists of sixteen 128Mx8 DDR
SDRAMs in 66 pin TSOP package mounted on a 184 Pin
FR4 substrate.
Synchronous design allows precise cycle control with the
use of system clock. Data I/O transactions are possible on
both edges and Burst Lenths allow the same device to be
useful for a variety of high bandwidth, high performance
memory system applications.
* This product is under development, is not qualifi ed or characterized and is subject to
change or cancellation without notice.
FEATURES
Double-data-rate architecture
Clock speeds of 133MHz and 166MHz
Bi-directional data strobes (DQS)
Differential clock inputs (CK & CK#)
Programmable Read Latency 2,2,5 (clock)
Programmable Burst Length (2,4,8)
Programmable Burst type (sequential & interleave)
Edge aligned data output, center aligned data input
Auto and self refresh
Serial presence detect
Dual Rank
Power Supply:
• V
CC
= V
CCQ
= +2.5V (133 and 166MHz)
JEDEC standard 184 pin DIMM package
PCB height:
JD3: 30.48mm (1.20")
NOTE: Consult factory for availability of:
RoHS compliant products
Vendor source control options
Industrial temperature option
OPERATING FREQUENCIES
DDR333 @CL=2.5 DDR266 @CL=2 DDR266 @CL=2.5
Clock Speed 166MHz 133MHz 133MHz
CL-t
RCD
-t
RP
2.5-3-3 2-3-3 2.5-3-3
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