W25Q80BL
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10.7 AC Electrical Characteristics (cont’d)
SPEC
DESCRIPTION SYMBOL ALT
MIN TYP MAX
UNIT
/HOLD Active Hold Time relative to CLK tCHHH 5 ns
/HOLD Not Active Setup Time relative to CLK tHHCH 5 ns
/HOLD Not Active Hold Time relative to CLK tCHHL 5 ns
/HOLD to Output Low-Z tHHQX
(2)
tLZ 7 ns
/HOLD to Output High-Z tHLQZ
(2)
tHZ 12 ns
Write Protect Setup Time Before /CS Low tWHSL
(3)
20 ns
Write Protect Hold Time After /CS High tSHWL
(3)
100 ns
/CS High to Power-down Mode tDP
(2)
3 µs
/CS High to Standby Mode without Electronic Signature
Read
tRES1
(2)
3 µs
/CS High to Standby Mode with Electronic Signature
Read
tRES2
(2)
1.8 µs
/CS High to next Instruction after Suspend tSUS
(2)
20 µs
Write Status Register Time tW 10 15 ms
Byte Program Time (First Byte)
(4)
t
BP1
30 50 µs
Additional Byte Program Time (After First Byte)
(4)
t
BP2
2.5 12 µs
Page Program Time tPP 0.4 0.8 ms
Sector Erase Time (4KB) tSE 50 200/400
(5)
ms
Block Erase Time (32KB) tBE
1
180 800 ms
Block Erase Time (64KB) tBE
2
200 1,000 ms
Chip Erase Time tCE 3 6 s
Notes:
1. Clock high + Clock low must be less than or equal to 1/f
C.
2. Value guaranteed by design and/or characterization, not 100% tested in production.
3. Only applicable as a constraint for a Write Status Register instruction when SRP0 bit is set to 1.
4. For multiple bytes after first byte within a page,
t
BPN
= t
BP1 +
t
BP2 * N
(typical) and t
BPN
= t
BP1 +
t
BP2 * N
(max), where N =
number of bytes programmed.
5. Max Value t
SE
with <50K cycles is 200ms and >50K & <100K cycles is 400ms.