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W25Q80BLSSIP

W25Q80BLSSIP首页预览图
型号: W25Q80BLSSIP
PDF文件:
  • W25Q80BLSSIP PDF文件
  • W25Q80BLSSIP PDF在线浏览
功能描述: 2.5V 8M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI
PDF文件大小: 2280.39 Kbytes
PDF页数: 共75页
制造商: WINBOND[Winbond]
制造商LOGO: WINBOND[Winbond] LOGO
制造商网址: http://www.winbond.com
捡单宝W25Q80BLSSIP
PDF页面索引
120%
W25Q80BL
Publication Release Date: July 08, 2010
- 37 - Preliminary - Revision C
9.2.18 Set Burst with Wrap (77h)
The Set Burst with Wrap (77h) instruction is used in conjunction with “Fast Read Quad I/O” and “Word
Read Quad I/O” instructions to access a fixed length of 8/16/32/64-byte section within a 256-byte page.
Certain applications can benefit from this feature and improve the overall system code execution
performance.
Similar to a Quad I/O instruction, the Set Burst with Wrap instruction is initiated by driving the /CS pin low
and then shifting the instruction code “77h” followed by 24 dummy bits and 8 “Wrap Bits”, W7-0. The
instruction sequence is shown in figure 17. Wrap bit W7 and the lower nibble W3-0 are not used.
W4 = 0 W4 =1 (DEFAULT)
W6, W5
Wrap Around Wrap Length Wrap Around Wrap Length
0 0
Yes 8-byte No N/A
0 1
Yes 16-byte No N/A
1 0
Yes 32-byte No N/A
1 1
Yes 64-byte No N/A
Once W6-4 is set by a Set Burst with Wrap instruction, all the following “Fast Read Quad I/O” and “Word
Read Quad I/O” instructions will use the W6-4 setting to access the 8/16/32/64-byte section within any
page. To exit the “Wrap Around” function and return to normal read operation, another Set Burst with
Wrap instruction should be issued to set W4 = 1. The default value of W4 upon power on is 1. In the case
of a system Reset while W4 = 0, it is recommended that the controller issues a Set Burst with Wrap
instruction to reset W4 = 1 prior to any normal Read instructions since W25Q80BL does not have a
hardware Reset Pin.
Figure 17. Set Burst with Wrap Instruction Sequence
0123456789101112 13 14 15Mode 3
Mode 0
/
CS
CLK
IO
0
IO
1
IO
2
IO
3
Instruction (
77h
)
don’t care don’t care don’t care wrap bit
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
w6
w5
w4
X
X
X
X
0123456789101112 13 14 15Mode 3
Mode 0
/
CS
CLK
IO
0
IO
1
IO
2
IO
3
Instruction (
77h
)
don’t care don’t care don’t care wrap bit
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
w6
w5
w4
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
w6
w5
w4
X
X
X
X
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