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W25Q80BLSSIP

W25Q80BLSSIP首页预览图
型号: W25Q80BLSSIP
PDF文件:
  • W25Q80BLSSIP PDF文件
  • W25Q80BLSSIP PDF在线浏览
功能描述: 2.5V 8M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI
PDF文件大小: 2280.39 Kbytes
PDF页数: 共75页
制造商: WINBOND[Winbond]
制造商LOGO: WINBOND[Winbond] LOGO
制造商网址: http://www.winbond.com
捡单宝W25Q80BLSSIP
PDF页面索引
120%
W25Q80BL
Publication Release Date: July 08, 2010
- 27 - Preliminary - Revision C
9.2.12 Fast Read Dual Output (3Bh)
The Fast Read Dual Output (3Bh) instruction is similar to the standard Fast Read (0Bh) instruction except
that data is output on two pins; IO
0
and IO
1
. This allows data to be transferred from the W25Q80BL at
twice the rate of standard SPI devices. The Fast Read Dual Output instruction is ideal for quickly
downloading code from Flash to RAM upon power-up or for applications that cache code-segments to
RAM for execution.
Similar to the Fast Read instruction, the Fast Read Dual Output instruction can operate at the highest
possible frequency of F
R (see AC Electrical Characteristics). This is accomplished by adding eight
“dummy” clocks after the 24-bit address as shown in figure 11. The dummy clocks allow the device's
internal circuits additional time for setting up the initial address. The input data during the dummy clocks
is “don’t care”. However, the IO
0
pin should be high-impedance prior to the falling edge of the first data
out clock.
Figure 11. Fast Read Dual Output Instruction Sequence Diagram
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