14
www.quicklogic.com
© 2002 QuickLogic Corporation
•
•
•
•
•
•
QL4016 QuickRAM Data Sheet Rev I
Pin Descriptions
Ordering Information
Table 12: Pin Descriptions
Pin Function Description
TDI/RSI
Test Data In for JTAG /RAM init.
Serial Data In
Hold HIGH during normal operation. Connects to serial
PROM data in for RAM initialization. Connect to VCC if
unused.
TRSTB/RRO
Active low Reset for JTAG /RAM
init. reset out
Hold LOW during normal operation. Connects to serial
PROM reset for RAM initialization. Connect to GND if
unused.
TMS Test Mode Select for JTAG
Hold HIGH during normal operation. Connect to VCC if
not used for JTAG.
TCK Test Clock for JTAG
Hold HIGH or LOW during normal operation. Connect to
VCC or ground if not used for JTAG.
TDO/RCO
Test data out for JTAG /RAM init.
clock out
Connect to serial PROM clock for RAM initialization. Must
be left unconnected if not used for JTAG or RAM
initialization.
STM Special Test Mode Must be grounded during normal operation.
I/ACLK
High-drive input and/or array
network driver
Can be configured as either or both.
I/GCLK
High-drive input and/or global
network driver
Can be configured as either or both.
I High-drive input Use for input signals with high fanout.
I/O Input/Output pin Can be configured as an input and/or output.
V
CC
Power supply pin Connect to 3.3V supply.
V
CCIO
Input voltage tolerance pin
Connect to 5.0V supply if 5V input tolerance is required,
otherwise connect to 3.3V supply.
GND Ground pin Connect to ground.
GND/THERM Ground/Thermal pin
Available on 456-PBGA only. Connect to ground plane on
PCB if heat sinking desired. Otherwise may be left
unconnected.
QL 4016 - 1 PF144 C
QuickLogic device
QuickRAM device
part number
Speed Grade
0 = Quick
1 = Fast
2 = Faster
3 = Faster
*4 = Wow
Operating Range
C = Commercial
I = Industrial
M = Military
Package Code
PL84 = 84-pin PLCC
PF100 = 100-pin TQFP
CF100 = 100-pin CQFP
PF144 = 144-pin TQFP
* Contact QuickLogic regarding availabliity