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QL4016-1PF100M

QL4016-1PF100M首页预览图
型号: QL4016-1PF100M
PDF文件:
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  • QL4016-1PF100M PDF在线浏览
功能描述: 16,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM
PDF文件大小: 478.65 Kbytes
PDF页数: 共18页
制造商: ETC[List of Unclassifed Manufacturers]
制造商LOGO: ETC[List of Unclassifed Manufacturers] LOGO
制造商网址:
捡单宝
PDF页面索引
100%
© 2002 QuickLogic Corp ora ti on
www.quicklogic.com
1
• • • • • •
Device Highlights
High Performance & High Density
16,000 Usable PLD Gates with 118 I/Os
300 MHz 16-bit Counters, 400 MHz
Datapaths, 160+ MHz FIFOs
0.35 µm four-layer metal non-volatile
CMOS process for smallest die sizes
High Speed Embedded SRAM
10 dual-port RAM modules, organized in
user-configurable 1,152 bit blocks
5 ns access times, each port independently
accessible
Fast and efficient for FIFO, RAM, and ROM
functions
Easy to Use / Fast Development
Cycles
100% routable with 100% utilization and
complete pin-out stability
Variable-grain logic cells provide high
performance and 100% utilization
Comprehensive design tools include high
quality Verilog/VHDL synthesis
Advanced I/O Capabilities
Interfaces with both 3.3 V and 5.0 V devices
PCI compliant with 3.3 V and 5.0 V busses
for -1/-2/-3/-4 speed grades
Full JTAG boundary scan
I/O Cells with individually controlled
Registered Input Path and Output Enables
Figure 1: QuickRAM Block Diagram
10
RA M
Blocks
320
Hi gh S pee d
Logic Cells
Interface
QL401 6 QuickRAM Data Sheet
16,000 Usable PLD Gate QuickRAM ESP Combining Performance,
Density and Embedded RAM
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