268 Intel
®
E7520 Memory Controller Hub (MCH) Datasheet
Ballout and Package Specifications
Table 7-1. MCH Ballout (Left Half – Top View)
33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
AN VSS
DDRB_D
Q
[1]
DDRB_D
QSN[0]
VCCDDR
DDRB_D
Q
[2]
DDRCKE
[1]
VSS
DDRB_D
Q
[9]
DDRB_D
QSN[1]
VCCDDR
DDRB_D
Q
[10]
DDRA_M
A
[7]
VSS
DDRB_D
QSP[11]
DDRB_D
QSN[11]
AM
VSS
DDRB_D
Q
[5]
DDRB_D
Q
[0]
VSS
DDRB_D
QSP[0]
DDRB_D
Q
[3]
VSS
DDRB_BA
[2]
DDRB_D
Q
[8]
VSS
DDRB_D
QSP[1]
DDRB_D
Q
[11]
VSS
DDRB_D
Q
[21]
DDRB_D
Q
[17]
VSS
AL
VSS
DDRA_
DQS[9]
DDRA_D
QSN[9]
VCCDDR
DDRB_D
QSN[9]
DDRB_D
Q
[6]
VSS
DDRCKE
[2]
DDRB_D
Q
[12]
VCCDDR
DDRB_D
QSN[10]
DDRB_D
Q
[14]
VSS
DDRB_M
A
[8]
DDRB_D
Q
[20]
VCCDDR
DDRB_D
QSN[2]
AK
DDRA_D
Q
[5]
DDRA_D
Q
[0]
VSS
DDRB_D
Q
[4]
DDRB_D
QSP[9]
VSS
DDRB_D
Q
[7]
DDRCKE
[3]
VSS
DDRB_D
Q
[13]
DDRB_D
QSP[10]
VSS
DDRB_D
Q
[15]
DDRA_M
A
[8]
VSS
DDRB_D
Q
[16]
DDRB_D
QSP[2]
AJ
DDRA_D
Q
[4]
VSS
DDRA_D
QSN[0]
DDRA_D
QSP[0]
VSS
DDRCKE
[6]
DDRCKE
[5]
VCCDDR
DDRA_D
QSN[1]
DDRA_D
QSP[1]
VSS
DDRA_M
A
[9]
DDRB_M
A
[9]
VCCDDR
RESERVE
D
DDRA_D
Q
[22]
VSS
AH
VCCEXP
EXP_B_T
XN[0]
DDRA_D
Q
[1]
VSS
DDRA_D
Q
[2]
DDRCKE
[7]
VSS
DDRCKE
[4]
DDRA_D
Q
[14]
VSS
DDRB_M
A
[12]
DDRB_M
A
[11]
VSS
DDRA_D
QSN[2]
DDRA_D
QSP[2]
VSS
DDRA_M
A
[5]
AG
EXP_B_R
XP[0]
EXP_B_T
XP[0]
VSS
DDRA_D
Q
[6]
DDRA_D
Q
[7]
VCCDDR
DDRA_D
Q
[8]
DDRA_D
Q
[9]
VSS
DDRA_D
Q
[15]
DDRA_M
A
[12]
VCCDDR
DDRA_D
Q
[17]
DDRA_D
Q
[23]
VSS
DDRA_D
Q
[19]
DDRB_M
A
[6]
AF
EXP_B_R
XN[0]
VSS
EXP_B_T
XP[1]
RESERVE
D
VSS
DDRA_D
Q
[3]
DDRA_D
Q
[13]
VSS
DDRA_D
QSP[10]
DDRA_D
QSN[10]
VSS
DDRA_M
A
[11]
DDRA_D
Q
[16]
VSS
DDRA_D
Q
[18]
DDRA_M
A
[6]
VSS
AE
VCCEXP
EXP_B_R
XP[1]
EXP_B_T
XN[1]
VCCEXP
EXP_B_R
XN[4]
DDRA_D
Q
[12]
VSS
DDRCKE
[0]
DDRA_
BA[2]
VCCDDR
RESERVE
D
DDRA_D
Q
[20]
VSS
DDRA_D
QSP[11]
DDRA_D
QSN[11]
VCCDDR
DDRA_D
Q
[28]
AD
EXP_B_T
XN[2]
EXP_B_R
XN[1]
VSS
EXP_B_R
XN[2]
EXP_B_R
XP[4]
VSS
EXP_B_T
XP[4]
EXP_B_T
XN[4]
VSS
DDRA_D
Q
[10]
DDRA_D
Q
[11]
VSS
DDRA_D
Q
[21]
RESERVE
D
VSS
DDRB_M
A
[7]
DDRA_D
Q
[31]
AC
EXP_B_T
XP[2]
VSS
EXP_B_R
XP[3]
EXP_B_R
XP[2]
VCCEXP
EXP_B_T
XN[5]
EXP_B_T
XP[5]
VSS
EXP_B_R
XP[5]
EXP_B_R
XN[5]
VCCDDR VSS VCCDDR VSS VCCDDR VSS VCCDDR
AB VCCEXP
EXP_B_T
XP[3]
EXP_B_R
XN[3]
VSS
EXP_B_T
XP[6]
EXP_B_T
XN[6]
VCCEXP
EXP_B_R
XP[6]
EXP_B_R
XN[6]
VCCEXP VSS VCCDDR VSS VCCDDR VSS VCCDDR VSS
AA
EXP_C_T
XN[2]
EXP_B_T
XN[3]
VSS
EXP_C_R
XP[2]
EXP_C_R
XN[2]
VSS
EXP_B_T
XP[7]
EXP_B_T
XN[7]
VSS
RESERVE
D
VCCEXP VSS VCC VSS VCC VSS VCC
Y
EXP_C_T
XP[2]
VSS
EXP_C_R
XN[1]
EXP_C_R
XP[1]
VCCEXP
EXP_C_R
XP[0]
EXP_C_R
XN[0]
VSS
EXP_B_R
XP[7]
EXP_B_R
XN[7]
VSS VCCEXP VSS VCC VSS VCC VSS
W
VCCEXP
EXP_C_T
XP[3]
EXP_C_T
XN[3]
VSS
EXP_C_T
XN[1]
EXP_C_T
XP[1]
VCCEXP
EXP_C_T
XP[0]
EXP_C_T
XN[0]
VSS VCCEXP VSS VCC VSS VCC VSS VCC
V
EXP_C_R
XP[3]
EXP_C_R
XN[3]
VSS
EXP_C_T
XP[5]
EXP_C_T
XN[5]
VSS
EXP_C_R
XP[6]
EXP_C_R
XN[6]
VSS
EXP_C_R
XP[7]
VSSA_EX
P
VCCEXP VSS VCC VSS VCC VSS
U
EXP_CO
MP[0]
VSS
EXP_C_T
XP[4]
EXP_C_T
XN[4]
VCCEXP
EXP_VSS
BG
EXP_VCC
BG
VSS
EXP_CO
MP[1]
EXP_C_R
XN[7]
VCCA_EX
P
VSS VCC VSS VCC VSS VCC
T VCCEXP
EXP_C_R
XP[4]
EXP_B_R
XN[4]
VSS
EXP_C_T
XP[6]
EXP_C_T
XN[6]
VCCEXP
C_TXP[15
]
EXP_C_T
XN[7]
VCCEXP
EXP_CLK
_P
VCCEXP VSS VCC VSS VCC VSS
R
EXP_A_R
XP[0]
RESERVE
D
VSS
EXP_C_R
XP[5]
EXP_C_R
XN[5]
VSS
EXP_A_R
XN[4]
EXP_A_R
XP[4]
VSS
EXP_CLK
_N
VCCEXP VSS VCC VSS VCC VSS VCC
P
EXP_A_R
XN[0]
VSS
EXP_A_T
XN[0]
EXP_A_T
XP[0]
VCCEXP
EXP_A_T
XN[5]
EXP_A_T
XP[5]
VSS
EXP_A_T
XN[4]
EXP_A_T
XP[4]
VSS VCC VSSA_HI VCCA_HI VSS VCC VSS
N
VCCEXP
EXP_A_T
XN[1]
EXP_A_T
XP[1]
VSS
EXP_A_R
XN[1]
EXP_A_R
XP[1]
VSS
EXP_A_R
XN[5]
EXP_A_R
XP[5]
VSS VCC VSS VCC VSS VCC VSS VCC
M
EXP_A_T
XP[2]
EXP_A_T
XN[2]
VSS
EXP_A_T
XP[6]
EXP_A_T
XN[6]
VCCEXP
EXP_A_R
XP[6]
EXP_A_R
XN[6]
VSS
MCHPME
#
VSS VCC VSS VTT VSS VTT VSS
L
RESERVE
D
VSS
EXP_A_R
XP[2]
EXP_A_R
XN[2]
VSS
EXP_A_T
XP[7]
EXP_A_T
XN[7]
VSS
MCHGPE
#
HICLK VCC VSS VTT VSS VTT VSS VTT
K VCCEXP
EXP_A_T
XP[3]
EXP_A_T
XN[3]
VCCEXP
EXP_A_R
XP[7]
EXP_A_R
XN[7]
VCC HI[6] HICOMP VSS HREQ[4]# HA[3]# VSS HREQ[0]# HA[8]# VSS HD[21]#
J
EXP_A_R
XP[3]
EXP_A_R
XN[3]
VSS HI[0] HI[10] VSS HI[7] RSP# VSS CPURST#HREQ[2]# VSS HREQ[1]# HA[4]# VTT HD[17]# HD[23]#
H V3REF VSS
HI_VSWI
NG
HI[1] VCC HI[5] DBSY# VTT AP[1]# MCERR# VTT HREQ[3]# HA[7]# VSS HA[9]# HD[18]# VSS
G
VCC HI[11] HI[3] VSS HI[4] RS[2]# VSS BINIT# AP[0]# VSS HA[5]# HA[6]# VSS
HADSTB
[0]#
HA[10]# VSS HD[20]#
F
RESERVE
D
HIVREF VSS HI[8] RS[0]# VSS DEP[3]#
HSLWCR
ES
VSS BREQ[0]#HACVREF VSS HA[15]# HA[16]# VSS HA[13]# HD[19]#
E
HI[9] VSS HI_STBS HIT# VSS DEP[1]#
HODTCR
ES
VSS DEP[2]# VSS VTT HA[11]# HA[12]# VTT HA[14]# HD[16]# VTT
D
RESERVE
D
HI_STBF RS[1]# VTT BREQ[1]# HITM# VTT HA[17]# HA[24]# VSS HA[28]# HA[20]# VSS HA[35]# HA[32]# VSS HD[8]#
C
VCC HI[2]
PLLSEL
[0]#
HLOCK# DEP[0]# VSS HCRES0 HA[18]# VSS HA[25]#
HADSTB
[1]#
VSS HA[34]# HA[33]# VSS HD[0]# HD[6]#
B VSS BNR# DRDY# VSS DEFER# ADS# VSS HA[23]# HA[30]# VSS HA[21]# HA[27]# VSS HD[1]# HD[7]# VSS
A
VTT HTRDY#
PLLSEL
[1]#
BPRI# VSS HA[19]# HA[22]# VSS HA[29]# HA[26]# VSS HA[31]# HD[4]# VTT HD[3]#
33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17