254 Intel
®
E7520 Memory Controller Hub (MCH) Datasheet
Functional Description
5.12.2.2 Byte Count Field
The byte count field indicates the number of bytes following the byte count field when performing
a write or when setting up for a read. The byte count is also used when returning data to indicate the
following number of bytes (including the status byte) which are returned prior to the data. Note that
the byte count is only transmitted for block type accesses on SMBus. SMBus word or byte accesses
do not use the byte count.
5.12.2.3 Address Byte 3 Field
This field should be programmed with the Bus Number of the desired configuration register in the
lower 5 bits for a configuration access. For a memory-mapped access, this field selects which
memory-map region is being accessed. In contrast to how some earlier MCHs operated, there is no
status bit to poll to see if a transfer is currently in progress, because by definition if the transfer
completed than the task is done. The clock stretch is used to guarantee the transfer is truly
complete.
The MCH does not support access to other logical bus numbers via the SMBus port. All registers
“attached” to the configuration mechanism SMBus has access to are all on logical bus 0. The MCH
makes use of this knowledge to implement a modified usage of the Bus Number register providing
access to internal registers outside of the PCI compatible configuration window.
5.12.2.4 Address Byte 2 Field
This field indicates the Device Number & Function Number of the desired configuration register if
for a configuration type access, otherwise it should be set to zero.
3:2
Internal Command Size. All accesses are naturally aligned to the access width. This field
specifies the internal command to be issued by the SMBus slave logic to the MCH core.
00 = Read Dword
01 = Write Byte
10 = Write Word
11 = Write Dword
1:0
SMBus Command Size. This field specifies the SMBus command to be issued on the SMBus.
This field is used as an indication of the length of the transfer so that the slave knows when to
expect the PEC packet (if enabled).
00 = Byte
01 = Word
10 = DWord
11 = Reserved
Position Description
Position Description
7:0 Byte Count. Number of bytes following the byte count for a transaction.
Position Configuration Register Mode Description Memory Mapped Mode Description
7:5 Ignored. Memory map region to access.
01h = DMA
08h = DDR
09h = CHAP
Others = Reserved
4:0
Bus Number. Must be zero: the SMBus port
can only access devices on the MCH and all
devices are bus zero.
