Intel
®
E7520 Memory Controller Hub (MCH) Datasheet 183
Register Descriptions
Except for the registers listed below, all registers for Device 4 are exactly as for Device 2. See
Section 3.8 on page 3-124 for the remaining register definitions.
C4 – C7h EXP_PFCCA PCI Express Posted Flow Control Credits
Allocated
RO 0008_0030h
C8 – CBh EXP_NPFCCA PCI Express Non Posted Flow Control
Credits Allocated
RO 0008_0001h
100 – 103h EXP_ENHCAPST PCI Express Enhanced Capability
Structure
RO 0001_0001h
104 – 107h EXP_UNCERRSTS PCI Express Uncorrectable Error Status RO, R/WC 0000_0000h
108 – 10Bh EXP_UNCERRMSK PCI Express Uncorrectable Error Mask RO, R/W 0000_0000h
10C – 10Fh EXP_UNCERRSEV PCI Express Uncorrectable Error
Severity
RO, R/W 0006_0011h
110 – 113h EXP_CORERRSTS PCI Express Correctable Error Status R/WC 0000_0000h
114 – 117h EXP_CORERRMSK PCI Express Correctable Error Mask R/W 0000_0000h
118 – 11Bh EXP_AERCACR PCI Express Advanced Error Capabilities
and Control
RO, R/W 0000_0000h
11C – 11Fh EXP_HDRLOG0 PCI Express Header Log DW0 RO 0000_0000h
120 – 123h EXP_HDRLOG1 PCI Express Header Log DW1 RO 0000_0000h
124 – 127h EXP_HDRLOG2 PCI Express Header Log DW2 RO 0000_0000h
128 – 12Bh EXP_HDRLOG3 PCI Express Header Log DW3 RO 0000_0000h
12C – 12Fh EXP_RPERRCMD PCI Express Root Port Error Command R/W 0000_0000h
130 – 133h EXP_RPERRMSTS PCI Express Root Port Error Message
Status
RO, R/WC 0000_0000h
134 – 137h EXP_ERRSID PCI Express Error Source ID RO 0000_0000h
140 – 143h EXP_UNITERR PCI Express Unit Error Status RO, R/WC 0000_0000h
144 – 147h EXP_MASKERR PCI Express Mask Error RO, R/W 0000_E000h
148 – 14Bh EXP_ERRDOCMD PCI Express Error Do Command
Register
RO, R/W 0000_0000h
14C – 14Fh EXP_UNCERRDMSK PCI Express Uncorrectable Error Detect
Mask
RO, R/W 0000_0000h
150 – 153h EXP_CORERRDMSK PCI Express Correctable Error Detect
Mask
R/W 0000_0000h
158 – 15Bh EXP_UNITERRDMSK PCI Express Unit Error Detect Mask R/W 0000_0000h
160 – 163h EXP_FERR PCI Express First Error R/WC 0000_0000h
164 – 167h EXP_NERR PCI Express Next Error R/WC 0000_0000h
168 – 16Bh EXP_ERR_CTL PCI Express Error Control R/W 0000_0000h
Table 3-9. PCI Express Port B PCI Configuration Register Map (D4:F0) (Sheet 3 of 3)
Address
Offset
Mnemonic Register Name Access Default