122 Intel
®
E7520 Memory Controller Hub (MCH) Datasheet
Register Descriptions
This register contains the revision number of MCH Device 0. These bits are read only and writes to
this register have no effect.
3.7.6 SUBC- Sub-Class Code (D1:F0)
Address Offset: 0Ah
Access: RO
Size: 8 Bits
Default: 80h
3.7.7 BCC- Base Class Code (D1:F0)
Address Offset: 0Bh
Access: RO
Size: 8 Bits
Default: 08h
3.7.8 HDR- Header Type (D1:F0)
Address Offset: 0Eh
Access: RO
Size: 8 Bits
Default: 00h
Bit Field
Default &
Access
Description
7:0 09h
RO
Revision Identification Number (RID). The revision identification
number for MCH Device 1.
09h = C1 stepping.
0Ah = C2 stepping.
0Ch = C4 stepping.
Bit Field
Default &
Access
Description
7:0 80h
RO
Sub-Class Code (SUBC). The category of other (non-specific) system
peripheral.
Bit Field
Default &
Access
Description
7:0 08h
RO
Base Class Code (BASEC). The Base Class Code for a system
peripheral.
Bit Field
Default &
Access
Description
7:0 00h
RO
PCI Header (HDR). Indicates the Header Type of the device
00h = Single Function Device
