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LTC1417C

LTC1417C首页预览图
型号: LTC1417C
PDF文件:
  • LTC1417C PDF文件
  • LTC1417C PDF在线浏览
功能描述: Low Power 14-Bit, 400ksps Sampling ADC Converter with Serial I/O
PDF文件大小: 394.84 Kbytes
PDF页数: 共32页
制造商: LINER[Linear Technology]
制造商LOGO: LINER[Linear Technology] LOGO
制造商网址: http://www.linear.com
捡单宝LTC1417C
PDF页面索引
120%
5
LTC1417
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
t
H SCLK
SCLK High Time (Note 9) 10 ns
t
L SCLK
SCLK Low Time (Note 9) 10 ns
t
H EXTCLKIN
EXTCLKIN High Time 0.04 20 µs
t
L EXTCLKIN
EXTCLKIN Low Time 0.04 20 µs
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All voltage values are with respect to ground with DGND and
AGND wired together (unless otherwise noted).
Note 3: When these pin voltages are taken below V
SS
or above V
DD
, they
will be clamped by internal diodes. This product can handle input currents
greater than 100mA without latchup if the pin is driven below V
SS
(ground
for unipolar mode) or above V
DD
.
Note 4: When these pin voltages are taken below V
SS
they will be clamped
by internal diodes. This product can handle input currents greater than
100mA below V
SS
without latchup. These pins are not clamped to V
DD
.
Note 5: V
DD
= 5V, V
SS
= –5V, f
SAMPLE
= 400kHz, t
r
= t
f
= 5ns unless
otherwise specified.
Note 6: Linearity, offset and full-scale specifications apply for a single-
ended A
IN
+
input with A
IN
grounded.
Note 7: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 8: Bipolar offset is the offset voltage measured from –0.5LSB
when the output code flickers between 0000 0000 0000 00 and
1111 1111 1111 11.
Note 9: Guaranteed by design, not subject to test.
Note 10: Recommended operating conditions.
Note 11: The falling CONVST edge starts a conversion. If CONVST returns
high at a critical point during the conversion it can create small errors. For
best results ensure that CONVST returns high either within 625ns after
conversion start or after BUSY rises.
Note 12: Typical RMS noise at the code transitions. See Figure 2 for
histogram.
Note 13: t
11
of 40ns maximum allows f
SCLK
up to 10MHz for rising
capture with 50% duty cycle. f
SCLK
up to 20MHz for falling capture with
5ns setup time.
TI I G CHARACTERISTICS
UW
The indicates specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 5)
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Typical INL Curve
Differential Nonlinearity
vs Output Code
S/(N + D) vs Input Frequency
and Amplitude
OUTPUT CODE
40960
1.0
INL (LSBs)
0.5
0
0.5
1.0
8192
1417 G01
12288 16384
OUTPUT CODE
0
1.0
DNL ERROR (LSBs)
0.5
0
0.5
1.0
4096 8192
1417 G02
12288 16384
(T
A
= 25°C)
INPUT FREQUENCY (Hz)
SIGNAL/(NOISE + DISTORTION) (dB)
90
80
70
60
50
40
30
20
10
0
1k 100k 1M
1417 G03
10k
V
IN
= –60dB
V
IN
= 0dB
V
IN
= –20dB
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