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LT8580

LT8580首页预览图
型号: LT8580
PDF文件:
  • LT8580 PDF文件
  • LT8580 PDF在线浏览
功能描述: Boost/SEPIC/Inverting DC/DC Converter with 1A, 65V Switch, Soft-Start and Synchronization
PDF文件大小: 448.53 Kbytes
PDF页数: 共32页
制造商: LINER[Linear Technology]
制造商LOGO: LINER[Linear Technology] LOGO
制造商网址: http://www.linear.com
捡单宝LT8580
PDF页面索引
120%
LT8580
6
8580fa
For more information www.linear.com/LT8580
block DiagraM
pin FuncTions
FBX (Pin 1): Positive and Negative Feedback Pin. For a
noninverting or inverting converter, tie a resistor from the
FBX pin to V
OUT
according to the following equations:
R
FBX
=
OUT
83.3µA
; Noninverting Converter
R
FBX
=
V
OUT
+ 3mV
( )
83.3µA
; Inverting Converter
VC (Pin 2): Error Amplifier Output Pin. Tie external com-
pensation network to this pin.
V
IN
(Pin 3): Input Supply Pin. Must be locally bypassed.
SW (Pin 4): Switch Pin. This is the collector of the internal
NPN Power switch. Minimize the metal trace area connec-
ted to this pin to minimize EMI.
SHDN (Pin 5): Shutdown Pin. In conjunction with the
UVLO (undervoltage lockout) circuit, this pin is used
to enable/disable the chip and restart the soft-start
sequence. Drive below 1.21V to disable the chip. Drive
above 1.40V to activate the chip and restart the soft-start
sequence. Do not float this pin.
R
T (Pin 6): Timing Resistor Pin. Adjusts the switching
frequency. Place a resistor from this pin to ground to set
the frequency to a fixed free running level. Do not float
this pin.
SS (Pin 7): Soft-Start Pin. Place a soft-start capacitor here.
Upon start-up, the SS pin will be charged by a (nominally)
280k resistor to about 2.1V.
SYNC (Pin 8): To synchronize the switching frequency to
an outside clock, simply drive this pin with a clock. The
high voltage level of the clock needs to exceed 1.3V, and
the low level should be less 0.4V. Drive this pin to less
than 0.4V to revert to the internal free-running clock. See
the Applications Information section for more information.
GND (Exposed Pad Pin 9): Ground. Exposed pad must
be soldered directly to local ground plane.
+
+
+
+
+
7
5
3
1.204V
REFERENCE
ADJUSTABLE
OSCILLATOR
FREQUENCY
FOLDBACK
SLOPE
COMPENSATION
COMPARATOR
DISCHARGE
DETECT
SS VC
280k
Q2
SR2
R
S
14.5k
14.5k
Q
SR1
A3
A4
A1
A2
SYNC
÷N
RT
SHDN
FBX
1.3V
VC
C1
SW
0.02Ω
GND
R
T
R
FBX
DRIVER
L1
D1
I
LIMIT
V
IN
V
OUT
C
SS
C
C
C
IN
R
C
V
IN
SOFT-
START
SYNC
BLOCK
UVLO
R
S
Q
6
2
1
8580 BD
8
4
Q1
9
50k
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