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LT8580

LT8580首页预览图
型号: LT8580
PDF文件:
  • LT8580 PDF文件
  • LT8580 PDF在线浏览
功能描述: Boost/SEPIC/Inverting DC/DC Converter with 1A, 65V Switch, Soft-Start and Synchronization
PDF文件大小: 448.53 Kbytes
PDF页数: 共32页
制造商: LINER[Linear Technology]
制造商LOGO: LINER[Linear Technology] LOGO
制造商网址: http://www.linear.com
捡单宝LT8580
PDF页面索引
120%
LT8580
17
8580fa
For more information www.linear.com/LT8580
applicaTions inForMaTion
Thermal Lockout
If the die temperature reaches approximately 165°C, the
part will go into thermal lockout, the power switch will be
turned off and the soft-start capacitor will be discharged.
The part will be enabled again when the die temperature
has dropped by ~5°C (nominal).
Thermal Calculations
Power dissipation in the LT8580 chip comes from four
primary sources: switch I
2
R loss, NPN base drive (AC),
NPN base drive (DC), and additional input current. The
following formulas can be used to approximate the power
losses. These formulas assume continuous mode opera
-
tion, so they should not be used for calculating efficiency
in discontinuous mode or at light load currents.
AverageInput Current: I
IN
=
V
OUT
I
OUT
V
IN
h
Switch Conduction Loss: P
SW
=(DC)(I
IN
)(V
SW
)
BaseDriveLoss(AC): P
BAC
= 20ns(I
IN
)(V
OUT
)(f)
BaseDriveLoss(DC): P
BDC
=
(V
IN
)(I
IN
)(DC)
40
Input Power Loss: P
INP
= 6mA (V
IN
)
where:
V
SW
= switch on voltage (see Typical Performance
Characteristics for Switch Saturation Voltage)
DC = duty cycle (see the Power Switch Duty Cycle sec
-
tion for formulas)
h = power conversion efficiency (typically 85% at high
currents)
Example: boost configuration, V
IN
= 5V, V
OUT
= 12V,
I
OUT
= 0.2A, f = 1.25MHz, V
D
= 0.5V:
I
IN
= 0.56A
DC = 62.0%
P
SW
= 117mW
P
BAC
= 169mW
P
BDC
= 44mW
P
INP
= 30mW
Total LT8580 power dissipation (P
TOT
) = 361mW
Thermal resistance for the LT8580 is influenced by the pres-
ence of internal, topside or backside planes. To calculate
die temperature, use the appropriate thermal resistance
number and add in worst-case ambient temperature:
T
J
= T
A
+ θ
JA
P
TOT
where T
J
= junction temperature, T
A
= ambient temperature,
and θ
JA
is the thermal resistance from the silicon junction
to the ambient air.
The published θ
JA
value is 43°C/W for the 3mm × 3mm
DFN package and 35°C/W to 40°C/W for the MSOP ex-
posed pad package. In practice, lower θ
JA
values can be
obtained if the board layout uses ground as a heat sink.
For instance, thermal resistances of 34.7°C/W for the
DFN package and 22.5°C/W for the MSOP package were
obtained on a board designed with large ground planes.
V
IN
Ramp Rate
While initially powering a switching converter application,
the V
IN
ramp rate should be limited. High V
IN
ramp rates can
cause excessive inrush currents in the passive components
of the converter. This can lead to current and/or voltage
overstress and may damage the passive components or
the chip. Ramp rates less than 500mV/µs, depending on
component parameters, will generally prevent these issues.
Also, be careful to avoid hot-plugging. Hot-plugging occurs
when an active voltage supply is “instantly” connected or
switched to the input of the converter. Hot-plugging results
in very fast input ramp rates and is not recommended.
Finally, for more information, refer to Linear application
note AN88, which discusses voltage overstress that can
occur when an inductive source impedance is hot-plugged
to an input pin bypassed by ceramic capacitors.
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