LT1952
14
1952f
R
BLANK
(MIN)
= 10k
10k < R
BLANK
≤ 240k 100ns
(AUTOMATIC)
LEADING
EDGE
BLANKING
(PROGRAMMABLE)
EXTENDED
BLANKING
CURRENT
SENSE
DELAY
OUT
BLANKING
1952 F06
0 Xns
X + 45ns [X + 45(R
BLANK
/10k)]ns
APPLICATIO S I FOR ATIO
WUU
U
Blanking is provided in 2 phases (Figure 6): The first phase
automatically blanks during gate rise time. Gate rise times
can vary depending on MOSFET type. For this reason the
LT1952 performs true ‘leading edge blanking’ by auto-
matically blanking OC and I
SENSE
comparator outputs until
OUT rises to within 0.5V of V
IN
or reaches its clamp level
of 13V. The second phase of blanking starts after the
leading edge of OUT has been completed. This phase is
programmable by the user with a resistor connected from
the BLANK pin to ground. Typical durations for this portion
of the blanking period are from 45ns at R
BLANK
= 10k to
540ns at R
BLANK
= 120k. Blanking duration can be approxi-
mated as:
Blanking (extended) = [45(R
BLANK
/10k)]ns
(see graph in Typical Performance Characteristics)
Figure 6. Leading Edge Blank Timing
Figure 7. Programming Slope Compensation
Programming Current Limit (OC Pin)
The LT1952 uses a precise 100mV sense threshold at the
OC pin to detect over-current conditions in the converter
and set a soft-start latch. It is independent of duty cycle
because it is not affected by slope compensation pro-
grammed at the I
SENSE
pin. The OC pin monitors the peak
current in the primary MOSFET by sensing the voltage
across a sense resistor (R
S
) in the source of the MOSFET.
The current limit for the converter can be programmed by,
Current limit = (100mV/R
S
)(N
P
/N
S
) – (1/2)(I
RIPPLE
)
where,
R
S
= sense resistor in source of primary MOSFET
I
RIPPLE
= p-p ripple current in the output inductor L1
N
S
= number of transformer secondary turns
N
P
= number of transformer primary turns
Programming Slope Compensation
The LT1952 uses a current mode architecture to provide
fast response to load transients and to ease frequency
compensation requirements. Current mode switching regu-
lators which operate with duty cycles above 50% and have
continuous inductor current must add slope compensa-
tion to their current sensing loop to prevent subharmonic
oscillations. (For more information on slope compensa-
tion, see Application Note 19.) The LT1952 has program-
mable slope compensation to allow a wide range of
inductor values, to reduce susceptibility to PCB generated
noise and to optimize loop bandwidth. The LT1952 pro-
grams slope compensation by inserting a resistor R
SLOPE
in series with the I
SENSE
pin (Figure 7). The LT1952
generates a current at the I
SENSE
pin which is linear from
0% duty cycle to the maximum duty cycle of the OUT pin.
A simple calculation of I(I
SENSE
) • R
SLOPE
gives an added
ramp to the voltage at the I
SENSE
pin for programmable
slope compensation. (See both graphs ‘I
SENSE
Pin Current
vs. Duty Cycle’ and ‘I
SENSE
Maximum Threshold vs Duty
Cycle’ in the Typical Performance Characteristics
section.)
CURRENT SLOPE = 35µA • DC
V
(ISENSE)
= V
S
+ (I
SENSE
• R
SLOPE
)
I
SENSE
= 8µA + 35DC µA
DC = DUTY CYCLE
FOR SYNC OPERATION
I
SENSE(SYNC)
= 8µA + (k • 35DC)µA
k = f
OSC
/f
SYNC
1952 F07
I
SENSE
OUT
LT1952
OC
R
S
R
SLOPE
V
S
