LMX2486
SNAS324 –JANUARY 2006
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MUX[3:0] Frequency Out & Lock Detect MUX
These bits determine the output state of the Ftest/LD pin.
MUX[3:0] Output Type Output Description
0 0 0 0 High Impedance Disabled
0 0 0 1 Push-Pull General purpose
output, Logical “High”
State
0 0 1 0 Push-Pull General purpose
output, Logical “Low”
State
0 0 1 1 Push-Pull RF & IF Digital Lock
Detect
0 1 0 0 Push-Pull RF Digital Lock
Detect
0 1 0 1 Push-Pull IF Digital Lock Detect
0 1 1 0 Open Drain RF & IF Analog Lock
Detect
0 1 1 1 Open Drain RF Analog Lock
Detect
1 0 0 0 Open Drain IF Analog Lock
Detect
1 0 0 1 Push-Pull RF & IF Analog Lock
Detect
1 0 1 0 Push-Pull RF Analog Lock
Detect
1 0 1 1 Push-Pull IF Analog Lock
Detect
1 1 0 0 Push-Pull IF R Divider divided
by 2
1 1 0 1 Push-Pull IF N Divider divided
by 2
1 1 1 0 Push-Pull RF R Divider divided
by 2
1 1 1 1 Push-Pull RF N Divider divided
by 2
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