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LMX2486

LMX2486首页预览图
型号: LMX2486
PDF文件:
  • LMX2486 PDF文件
  • LMX2486 PDF在线浏览
功能描述: 1.0 GHz - 4.5 GHz High Performance Delta-Sigma Low Power Dual PLLatinum™ Frequency Synthesizers with 3.0 GHz Integer PLL
PDF文件大小: 1180.69 Kbytes
PDF页数: 共40页
制造商: TI1[Texas Instruments]
制造商LOGO: TI1[Texas Instruments] LOGO
制造商网址: http://www.ti.com
捡单宝LMX2486
PDF页面索引
120%
Frequency
Input Pin
Device
Under
Test
Evaluation Board
Power Supply
Network Analyzer
LMX2486
www.ti.com
SNAS324 JANUARY 2006
Note that for the RF N counter, a fourth order fractional modulator is used in 22-bit mode with a fraction of
2097150 / 4194301 is used. The reason for this long fraction is to test the RF N counter and supporting fractional
circuitry as completely as possible.
Input Impedance Measurement Procedure
The above block diagram shows the test setup used for measuring the input impedance for the LMX2486. The
DC blocking capacitor used between the input SMA connector and the pin being measured must be changed to
a zero Ohm resistor. This procedure applies to the FinRF, FinIF, and OSCin pins. The basic test procedure is to
calibrate the network analyzer, ensure that the part is powered up, and then measure the input impedance. The
network analyzer can be calibrated by using either calibration standards or by soldering resistors directly to the
evaluation board. An open can be implemented by putting no resistor, a short can be implemented by soldering a
zero ohm resistor as close as possible to the pin being measured, and a short can be implemented by soldering
two 100 ohm resistors in parallel as close as possible to the pin being measured. Calibration is done with the
PLL removed from the PCB. This requires the use of a clamp down fixture that may not always be generally
available. If no clamp down fixture is available, then this procedure can be done by calibrating up to the point
where the DC blocking capacitor usually is, and then implementing port extensions with the network analyzer.
Zero ohm resistor is added back for the actual measurement. Once the setup is calibrated, it is necessary to
ensure that the PLL is powered up. This can be done by toggling the power down bits (RF_PD and IF_PD) and
observing that the current consumption indeed increases when the bit is disabled. Sometimes it may be
necessary to apply a signal to the OSCin pin in order to program the part. If this is necessary, disconnect the
signal once it is established that the part is powered up. It is useful to know the input impedance of the PLL for
the purposes of debugging RF problems and designing matching networks. Another use of knowing this
parameter is make the trace width on the PCB such that the input impedance of this trace matches the real part
of the input impedance of the PLL frequency of operation. In general, it is good practice to keep trace lengths
short and make designs that are relatively resistant to variations in the input impedance of the PLL.
Functional Description
GENERAL
The LMX2486 consists of integrated N counters, R counters, and charge pumps. The TCXO, VCO and loop filter
are supplied external to the chip. The various blocks are described below.
TCXO, OSCILLATOR BUFFER, AND R COUNTER
The oscillator buffer must be driven single-ended by a signal source, such as a TCXO. The OSCout pin is
included to provide a buffered output of this input signal and is active when the OSC_OUT bit is set to one. The
ENOSC pin can be also pulled high to ensure that the OSCout pin is active, regardless of the status of the
registers in the LMX2486.
The R counter divides this TCXO frequency down to the comparison frequency.
Copyright © 2006, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Links: LMX2486
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