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LMP90099MH/NOPB

LMP90099MH/NOPB首页预览图
型号: LMP90099MH/NOPB
PDF文件:
  • LMP90099MH/NOPB PDF文件
  • LMP90099MH/NOPB PDF在线浏览
功能描述: Sensor AFE System: Multi-Channel, Low Power 24-Bit
PDF文件大小: 2000.5 Kbytes
PDF页数: 共62页
制造商: NSC[National Semiconductor]
制造商LOGO: NSC[National Semiconductor] LOGO
制造商网址: http://www.national.com
捡单宝LMP90099MH/NOPB
PDF页面索引
120%
16.0 Functional Description
Throughout this datasheet, the LMP90100/LMP90099/
LMP90098/LMP90097 will be referred to as the LMP90xxx.
The LMP90xxx is a low-power 24-Bit ΣΔ ADC with 4 fully dif-
ferential / 7 single-ended analog channels for the LMP90100/
LMP90099 and 2 full differential / 4 single-ended for the
LMP90098/LMP90097. Its serial data output is two’s comple-
ment format. The output data rate (ODR) ranges from 1.6775
SPS to 214.65 SPS.
The serial communication for LMP90xxx is SPI, a syn-
chronous serial interface that operates using 4 pins: chip
select bar (CSB), serial clock (SCLK), serial data in (SDI), and
serial data out / data ready bar (SDO/DRYDYB).
True continuous built-in offset and gain background calibra-
tion is also available to improve measurement accuracy. Un-
like other ADCs, the LMP90xxx’s background calibration can
run without heavily impacting the input signal. This unique
technique allows for positive as well as negative gain calibra-
tion and is available at all gain settings.
The registers can be found in Section 18.0 Registers, and a
detailed description of the LMP90xxx are provided in the fol-
lowing sections.
16.1 SIGNAL PATH
16.1.1 Reference Input (VREF)
The differential reference voltage VREF (VREFP – VREFN)
sets the range for VIN.
The muxed VREF allows the user to choose between VREF1
or VREF2 for each channel. This selection can be made by
programming the VREF_SEL bit in the CHx_INPUTCN reg-
isters (CHx_INPUTCN: VREF_SEL). The default mode is
VREF1. If VREF2 is used, then VIN6 and VIN7 cannot be
used as inputs because they share the same pin.
Refer to Section 17.2.2 VREF for VREF applications infor-
mation.
16.1.2 Flexible Input MUX (VIN)
LMP90xxx provides a flexible input MUX as shown in Figure
3. The input that is digitized is VIN = VINP – VINN; where
VINP and VINN can be any availablie input.
The digitized input is also known as a channel, where
CH = VIN = VINP – VINN. Thus, there are a maximum of 4
differential channels: CH0, CH1, CH2, and CH3 for the
LMP90100/LMP90099. The LMP90098/LMP90097 has a
maximum of 2 differential channels: CH0 and CH1 because
it does not have access to the VIN3, VIN4, and VIN5 pins.
LMP90xxx can also be configured single-endedly, where the
common ground is any one of the inputs. There are a maxi-
mum of 7 single-ended channels: CH0, CH1, CH2, CH3, CH4,
CH5, and CH6 for the LMP90100/LMP90099 and 4: CH0,
CH1, CH2, CH3 for the LMP90098/LMP90097.
The input MUX can be programmed in the CHx_INPUTCN
registers. For example on the LMP90100, to program CH0 =
VIN = VIN4 – VIN1, go to the CH0_INPUTCN register and set:
1. VINP = 0x4
2. VINN = 0x1
30139577
FIGURE 3. Simplified VIN Circuitry
www.national.com 22
LMP90100/LMP90099/LMP90098/LMP90097
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