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LMH6619QMAK/NOPB

LMH6619QMAK/NOPB首页预览图
型号: LMH6619QMAK/NOPB
PDF文件:
  • LMH6619QMAK/NOPB PDF文件
  • LMH6619QMAK/NOPB PDF在线浏览
功能描述: 130 MHz, 1.25 mA RRIO Operational Amplifier
PDF文件大小: 1210.32 Kbytes
PDF页数: 共30页
制造商: TI1[Texas Instruments]
制造商LOGO: TI1[Texas Instruments] LOGO
制造商网址: http://www.ti.com
捡单宝LMH6619QMAK/NOPB
PDF页面索引
120%
PRODUCTPREVIEW
LMH6619Q
www.ti.com
SNOSC78A JUNE 2012REVISED NOVEMBER 2012
+5V Electrical Characteristics
Unless otherwise specified, all limits are guaranteed for T
J
= +25°C, V
+
= 5V, V
= 0V, V
CM
= V
O
= V
+
/2, A
V
= +1 (R
F
= 0),
otherwise R
F
= 2 k for A
V
+1, R
L
= 1 k || 5 pF. Boldface Limits apply at temperature extremes.
Symbol Parameter Condition Min Typ Max Units
(1) (2) (1)
Frequency Domain Response
SSBW –3 dB Bandwidth Small Signal A
V
= 1, R
L
= 1 k, V
OUT
= 0.2 V
PP
130
MHz
A
V
= 2, 1, R
L
= 1 k, V
OUT
= 0.2 V
PP
53
GBW Gain Bandwidth A
V
= 10, R
F
= 2 k, R
G
= 221, 54 57 MHz
R
L
= 1 k, V
OUT
= 0.2 V
PP
LSBW 3 dB Bandwidth Large Signal A
V
= 1, R
L
= 1 k, V
OUT
= 2 V
PP
15
MHz
A
V
= 2, R
L
= 150, V
OUT
= 2 V
PP
15
Peak Peaking A
V
= 1, C
L
= 5 pF 0.5 dB
0.1 0.1 dB Bandwidth A
V
= 2, V
OUT
= 0.5 V
PP
, 15 MHz
dBBW R
F
= R
G
= 1 k
DG Differential Gain A
V
= +2, 4.43 MHz, 0.6V < V
OUT
< 2V, 0.1 %
R
L
= 150 to V
+
/2
DP Differential Phase A
V
= +2, 4.43 MHz, 0.6V < V
OUT
< 2V, 0.1 deg
R
L
= 150 to V
+
/2
Time Domain Response
t
r
/t
f
Rise & Fall Time 2V Step, A
V
= 1 30 ns
SR Slew Rate 2V Step, A
V
= 1 44 55 V/μs
t
s_0.1
0.1% Settling Time 2V Step, A
V
= 1 90
ns
t
s_0.01
0.01% Settling Time 2V Step, A
V
= 1 120
Distortion and Noise Performance
SFDR Spurious Free Dynamic Range f
C
= 100 kHz, V
OUT
= 2 V
PP
, R
L
= 1 k 100
f
C
= 1 MHz, V
OUT
= 2 V
PP
, R
L
= 1 k 88 dBc
f
C
= 5 MHz, V
O
= 2 V
PP
, R
L
= 1 k 61
e
n
Input Voltage Noise Density f = 100 kHz 10
nV/
i
n
Input Current Noise Density f = 100 kHz 1
pA/
CT Crosstalk f = 5 MHz, V
IN
= 2 V
PP
80 dB
Input, DC Performance
V
OS
Input Offset Voltage V
CM
= 0.5V (pnp active) 0.1 ±0.75
mV
V
CM
= 4.5V (npn active) ±1.3
TCV
OS
Input Offset Voltage Temperature Drift
(3)
0.8 µV/°C
I
B
Input Bias Current V
CM
= 0.5V (pnp active) 1.5 2.4
μA
V
CM
= 4.5V (npn active) +1.0 +1.9
I
OS
Input Offset Current 0.01 ±0.26 μA
C
IN
Input Capacitance 1.5 pF
R
IN
Input Resistance 8 M
CMVR Common Mode Voltage Range DC, CMRR 65 dB 0.2 5.2 V
CMRR Common Mode Rejection Ratio V
CM
Stepped from 0.1V to 3.4V 81 98
dB
V
CM
Stepped from 4.0V to 5.1V 84 108
A
OL
Open Loop Voltage Gain R
L
= 1 k to +4.6V or +0.4V 84 100
dB
R
L
= 150 to +4.5V or +0.5V 78 83
Output DC Characteristics
(1) Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlations using the
Statistical Quality Control (SQC) method.
(2) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on
shipped production material.
(3) Voltage average drift is determined by dividing the change in V
OS
by temperature change.
Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Links: LMH6619Q
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