Register 2: Brown-Out Reset Control (PBORCTL), offset 0x030
This register is responsible for controlling reset conditions after initial power-on reset.
Brown-Out Reset Control (PBORCTL)
Base 0x400F.E000
Offset 0x030
Type R/W, reset 0x0000.7FFD
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
reserved
BORIORreserved
ROR/WROROROROROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0ROreserved31:2
BOR Interrupt or Reset
This bit controls how a BOR event is signaled to the controller. If set, a
reset is signaled. Otherwise, an interrupt is signaled.
0R/WBORIOR1
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved0
June 22, 201078
Texas Instruments-Production Data
System Control