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LM3S8530-IQR80-C1

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型号: LM3S8530-IQR80-C1
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  • LM3S8530-IQR80-C1 PDF文件
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功能描述: Stellaris® LM3S8530 Microcontroller
PDF文件大小: 4249.13 Kbytes
PDF页数: 共526页
制造商: TI[Texas Instruments]
制造商LOGO: TI[Texas Instruments] LOGO
制造商网址: http://www.ti.com
捡单宝LM3S8530-IQR80-C1
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120%
Table 17-7. Signals by Function, Except for GPIO (continued)
DescriptionBuffer Type
a
Pin TypePin NumberPin NameFunction
Ground reference for logic and I/O pins.Power-B6
C4
C5
F10
F11
F12
H3
J3
J10
K5
K6
K10
L10
GNDPower
The ground reference for the analog circuits ( etc.).
These are separated from GND to minimize the
electrical noise contained on VDDfrom affecting the
analog functions.
Power-A5
B5
GNDA
Low drop-out regulator output voltage. This pin
requires an external capacitor between the pin and
GND of 1 µF or greater. When the on-chip LDO is
used to provide power to the logic, the LDOpin must
also be connected to the VDD25 pins at the board
level in addition to the decoupling capacitor(s).
Power-E3LDO
Positive supply for I/O and some logic.Power-L12VDD
Positive supply for most of the logic function,
including the processor core and most peripherals.
Power-C3
D3
F3
G3
VDD25
Positive supply for I/O and some logic.Power-E10
G10
G11
G12
H10
K7
K8
K9
VDD33
The positive supply (3.3 V) for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from VDD to minimize the electrical noise
contained on VDD from affecting the analog
functions. VDDA pins must be connected to 3.3 V,
regardless of system implementation.
Power-C6
C7
VDDA
SSI module 0 clock.TTLI/OM4SSI0ClkSSI
SSI module 0 frame.TTLI/OL4SSI0Fss
SSI module 0 receive.TTLIL5SSI0Rx
SSI module 0 transmit.TTLOM5SSI0Tx
SSI module 1 clock.TTLI/OA11SSI1Clk
SSI module 1 frame.TTLI/OB12SSI1Fss
SSI module 1 receive.TTLIB11SSI1Rx
SSI module 1 transmit.TTLOA12SSI1Tx
June 22, 2010480
Texas Instruments-Production Data
Signal Tables
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