Table 17-3. Signals by Function, Except for GPIO (continued)
DescriptionBuffer Type
a
Pin TypePin NumberPin NameFunction
I
2
C module 0 clock.ODI/O70I2C0SCLI2C
I
2
C module 0 data.ODI/O71I2C0SDA
JTAG/SWD CLK.TTLI80SWCLKJTAG/SWD/SWO
JTAG TMS and SWDIO.TTLI/O79SWDIO
JTAG TDO and SWO.TTLO77SWO
JTAG/SWD CLK.TTLI80TCK
JTAG TDI.TTLI78TDI
JTAG TDO and SWO.TTLO77TDO
JTAG TMS and SWDIO.TTLI/O79TMS
JTAG TRST.TTLI89TRST
Ground reference for logic and I/O pins.Power-9
15
21
33
39
45
54
57
63
69
82
87
94
GNDPower
The ground reference for the analog circuits ( etc.).
These are separated from GND to minimize the
electrical noise contained on VDDfrom affecting the
analog functions.
Power-4
97
GNDA
Low drop-out regulator output voltage. This pin
requires an external capacitor between the pin and
GND of 1 µF or greater. When the on-chip LDO is
used to provide power to the logic, the LDOpin must
also be connected to the VDD25 pins at the board
level in addition to the decoupling capacitor(s).
Power-7LDO
Positive supply for I/O and some logic.Power-8
20
32
44
55
56
68
81
93
VDD
Positive supply for most of the logic function,
including the processor core and most peripherals.
Power-14
38
62
88
VDD25
The positive supply (3.3 V) for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from VDD to minimize the electrical noise
contained on VDD from affecting the analog
functions. VDDA pins must be connected to 3.3 V,
regardless of system implementation.
Power-3
98
VDDA
469June 22, 2010
Texas Instruments-Production Data
Stellaris® LM3S8530 Microcontroller
