Table 17-2. Signals by Signal Name
DescriptionBuffer Type
a
Pin TypePin NumberPin Name
CAN module 0 receive.TTLI10CAN0Rx
CAN module 0 transmit.TTLO11CAN0Tx
CAN module 1 receive.TTLI47CAN1Rx
CAN module 1 transmit.TTLO61CAN1Tx
CAN module 2 receive.TTLI6CAN2Rx
CAN module 2 transmit.TTLO5CAN2Tx
Capture/Compare/PWM 0.TTLI/O66CCP0
Capture/Compare/PWM 1.TTLI/O34CCP1
CPU Mode bit 0. Input must be set to logic 0 (grounded); other
encodings reserved.
TTLI65CMOD0
CPU Mode bit 1. Input must be set to logic 0 (grounded); other
encodings reserved.
TTLI76CMOD1
12.4-kΩ resistor (1% precision) used internally for Ethernet
PHY.
AnalogI41ERBIAS
Ground reference for logic and I/O pins.Power-9
15
21
33
39
45
54
57
63
69
82
87
94
GND
The ground reference for the analog circuits ( etc.). These
are separated from GND to minimize the electrical noise
contained on VDD from affecting the analog functions.
Power-4
97
GNDA
GND of the Ethernet PHY.Power-42
85
86
GNDPHY
I
2
C module 0 clock.ODI/O70I2C0SCL
I
2
C module 0 data.ODI/O71I2C0SDA
Low drop-out regulator output voltage. This pin requires an
external capacitor between the pin and GND of 1 µF or
greater. When the on-chip LDO is used to provide power to
the logic, the LDO pin must also be connected to the VDD25
pins at the board level in addition to the decoupling
capacitor(s).
Power-7LDO
Ethernet LED 0.TTLO59LED0
Ethernet LED 1.TTLO60LED1
MDIO of the Ethernet PHY.TTLI/O58MDIO
465June 22, 2010
Texas Instruments-Production Data
Stellaris® LM3S8530 Microcontroller
