Register 27: Ethernet PHY Management Register 24 –MDI/MDIX Control (MR24),
address 0x18
This register enables software to control the behavior of the MDI/MDIX mux and its switching
capabilities.
Ethernet PHY Management Register 24 –MDI/MDIX Control (MR24)
Base 0x4004.8000
Address 0x18
Type R/W, reset 0x00C0
0123456789101112131415
MDIX_SDMDIX_CMMDIXAUTO_SWPD_MODEreserved
R/WR/WR/WR/WROR/WR/WR/WROROROROROROROROType
0000001100000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x00ROreserved15:8
Parallel Detection Mode
When set, enables the Parallel Detection mode and allows auto-switching
to work when auto-negotiation is not enabled.
1R/WPD_MODE7
Auto-Switching Enable
When set, enables Auto-Switching of the MDI/MDIX mux.
1R/WAUTO_SW6
Auto-Switching Configuration
When set, indicates that the MDI/MDIX mux is in the crossover (MDIX)
configuration.
When 0, it indicates that the mux is in the pass-through (MDI)
configuration.
When the AUTO_SW bit is 1, the MDIX bit is read-only. When the
AUTO_SW bit is 0, the MDIX bit is read/write and can be configured
manually.
0R/WMDIX5
Auto-Switching Complete
When set, indicates that the auto-switching sequence has completed.
If 0, it indicates that the sequence has not completed or that
auto-switching is disabled.
0ROMDIX_CM4
Auto-Switching Seed
This field provides the initial seed for the switching algorithm. This seed
directly affects the number of attempts [5,4] respectively to write bits
[3:0].
A 0 sets the seed to 0x5.
0x0R/WMDIX_SD3:0
June 22, 2010458
Texas Instruments-Production Data
Ethernet Controller