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LM3S8530-IQR80-C1

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型号: LM3S8530-IQR80-C1
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  • LM3S8530-IQR80-C1 PDF文件
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功能描述: Stellaris® LM3S8530 Microcontroller
PDF文件大小: 4249.13 Kbytes
PDF页数: 共526页
制造商: TI[Texas Instruments]
制造商LOGO: TI[Texas Instruments] LOGO
制造商网址: http://www.ti.com
捡单宝LM3S8530-IQR80-C1
PDF页面索引
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120%
Register 19: Ethernet PHY Management Register 4 Auto-Negotiation
Advertisement (MR4), address 0x04
This register provides the advertised abilities of the Ethernet Controller used during auto-negotiation.
Bits 8:5 represent the Technology Ability Field bits. This field can be overwritten by software to
auto-negotiate to an alternate common technology. Writing to this register has no effect until
auto-negotiation is re-initiated by setting the RANEG bit in the MR0 register.
Ethernet PHY Management Register 4 Auto-Negotiation Advertisement (MR4)
Base 0x4004.8000
Address 0x04
Type R/W, reset 0x01E1
0123456789101112131415
SA0A1A2A3reservedRF
reserved
NP
ROROROROROR/WR/WR/WR/WROROROROR/WROROType
1000011110000000Reset
DescriptionResetTypeNameBit/Field
Next Page
When set, this bit indicates the Ethernet Controller is capable of Next
Page exchanges to provide more detailed information on the PHY layer’s
capabilities.
0RONP15
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved14
Remote Fault
When set, this bit indicates to the link partner that a Remote Fault
condition has been encountered.
0R/WRF13
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0ROreserved12:9
Technology Ability Field[3]
When set, this bit indicates that the Ethernet Controller supports the
100Base-TX full-duplex signaling protocol. If software wants to ensure
that this mode is not used, this bit can be cleared and auto-negotiation
re-initiated with the RANEG bit in the MR0 register.
1R/WA38
Technology Ability Field[2]
When set, this bit indicates that the Ethernet Controller supports the
100Base-TX half-duplex signaling protocol. If software wants to ensure
that this mode is not used, this bit can be cleared and auto-negotiation
re-initiated with the RANEG bit in the MR0 register.
1R/WA27
Technology Ability Field[1]
When set, this bit indicates that the Ethernet Controller supports the
10BASE-T full-duplex signaling protocol. If software wants to ensure
that this mode is not used, this bit can be cleared and auto-negotiation
re-initiated with the RANEG bit in the MR0 register..
1R/WA16
447June 22, 2010
Texas Instruments-Production Data
Stellaris® LM3S8530 Microcontroller
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