DescriptionResetTypeNameBit/Field
Clear Transmit FIFO Empty
Setting this bit clears the TXEMP interrupt in the MACRIS register.
0W1CTXEMP2
Clear Transmit Error
Setting this bit clears the TXER interrupt in the MACRIS register and
resets the TX FIFO write pointer.
0W1CTXER1
Clear Packet Received
Setting this bit clears the RXINT interrupt in the MACRIS register.
0W1CRXINT0
425June 22, 2010
Texas Instruments-Production Data
Stellaris® LM3S8530 Microcontroller