DescriptionResetTypeNameBit/Field
GPTM Timer B Stall Enable
The TBSTALL values are defined as follows:
DescriptionValue
Timer B continues counting while the processor is halted by the
debugger.
0
Timer B freezes counting while the processor is halted by the
debugger.
1
If the processor is executing normally, the TBSTALL bit is ignored.
0R/WTBSTALL9
GPTM TimerB Enable
The TBEN values are defined as follows:
DescriptionValue
TimerB is disabled.0
TimerB is enabled and begins counting or the capture logic is
enabled based on the GPTMCFG register.
1
0R/WTBEN8
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved7
GPTM TimerA PWM Output Level
The TAPWML values are defined as follows:
DescriptionValue
Output is unaffected.0
Output is inverted.1
0R/WTAPWML6
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved5
GPTM RTC Enable
The RTCEN values are defined as follows:
DescriptionValue
RTC counting is disabled.0
RTC counting is enabled.1
0R/WRTCEN4
GPTM TimerA Event Mode
The TAEVENT values are defined as follows:
DescriptionValue
Positive edge0x0
Negative edge0x1
Reserved0x2
Both edges0x3
0x0R/WTAEVENT3:2
June 22, 2010208
Texas Instruments-Production Data
General-Purpose Timers