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LM3S8530-IQR80-C1

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型号: LM3S8530-IQR80-C1
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  • LM3S8530-IQR80-C1 PDF文件
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功能描述: Stellaris® LM3S8530 Microcontroller
PDF文件大小: 4249.13 Kbytes
PDF页数: 共526页
制造商: TI[Texas Instruments]
制造商LOGO: TI[Texas Instruments] LOGO
制造商网址: http://www.ti.com
捡单宝LM3S8530-IQR80-C1
PDF页面索引
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120%
Interrupt Clear (GPTMICR) register. The time at which the event happened can be obtained
by reading the GPTM Timern (GPTMTnR) register.
In Input Edge Timing mode, the timer continues running after an edge event has been detected,
but the timer interval can be changed at any time by writing the GPTMTnILR register. The change
takes effect at the next cycle after the write.
9.3.6 16-Bit PWM Mode
A timer is configured to PWM mode using the following sequence:
1. Ensure the timer is disabled (the TnEN bit is cleared) before making any changes.
2. Write the GPTM Configuration (GPTMCFG) register with a value of 0x4.
3. In the GPTM Timer Mode (GPTMTnMR) register, set the TnAMS bit to 0x1, the TnCMR bit to
0x0, and the TnMR field to 0x2.
4. Configure the output state of the PWM signal (whether or not it is inverted) in the TnEVENTfield
of the GPTM Control (GPTMCTL) register.
5. Load the timer start value into the GPTM Timern Interval Load (GPTMTnILR) register.
6. Load the GPTM Timern Match (GPTMTnMATCHR) register with the desired value.
7. Set the TnEN bit in the GPTM Control (GPTMCTL) register to enable the timer and begin
generation of the output PWM signal.
In PWM Timing mode, the timer continues running after the PWM signal has been generated. The
PWM period can be adjusted at any time by writing the GPTMTnILR register, and the change takes
effect at the next cycle after the write.
9.4 Register Map
Table 9-3 on page 200 lists the GPTM registers. The offset listed is a hexadecimal increment to the
registers address, relative to that timer’s base address:
Timer0: 0x4003.0000
Timer1: 0x4003.1000
Timer2: 0x4003.2000
Timer3: 0x4003.3000
Table 9-3. Timers Register Map
See
page
DescriptionResetTypeNameOffset
202GPTM Configuration0x0000.0000R/WGPTMCFG0x000
203GPTM TimerA Mode0x0000.0000R/WGPTMTAMR0x004
205GPTM TimerB Mode0x0000.0000R/WGPTMTBMR0x008
207GPTM Control0x0000.0000R/WGPTMCTL0x00C
210GPTM Interrupt Mask0x0000.0000R/WGPTMIMR0x018
212GPTM Raw Interrupt Status0x0000.0000ROGPTMRIS0x01C
June 22, 2010200
Texas Instruments-Production Data
General-Purpose Timers
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