Table 1. Revision History (continued)
DescriptionRevisionDate
■ Deleted reset value for 16-bit mode from GPTMTAILR, GPTMTAMATCHR, and GPTMTAR registers
because the module resets in 32-bit mode.
■ Clarified CAN bit timing and corrected examples.
■ Made these changes to the Electrical Characteristics chapter:
– Removed V
SIH
and V
SIL
parameters from Operating Conditions table.
– Added table showing actual PLL frequency depending on input crystal.
– Changed the name of the t
HIB_REG_WRITE
parameter to t
HIB_REG_ACCESS
.
– Changed SSI set up and hold times to be expressed in system clocks, not ns.
6462October 2009
Corrected ordering numbers.5920July 2009
■ Clarified Power-on reset and RST pin operation; added new diagrams.
■ Clarified explanation of nonvolatile register programming in Internal Memory chapter.
■ Added explanation of reset value to FMPRE0/1/2/3, FMPPE0/1/2/3, USER_DBG, and USER_REG0/1
registers.
■ Added description for Ethernet PHY power-saving modes.
■ Corrected the reset values for bits 6 and 7 in the Ethernet MR24 register.
■ Changed buffer type for WAKE pin to TTL and HIB pin to OD.
■ In ADC characteristics table, changed Max value for GAIN parameter from ±1 to ±3 and added E
IR
(Internal voltage reference error) parameter.
■ Additional minor data sheet clarifications and corrections.
5902July 2009
■ Added JTAG/SWD clarification (see “Communication with JTAG/SWD” on page 57).
■ Added clarification that the PLL operates at 400 MHz, but is divided by two prior to the application
of the output divisor.
■ Added "GPIO Module DC Characteristics" table (see Table 19-4 on page 486).
■ Additional minor data sheet clarifications and corrections.
5367April 2009
■ Corrected bit type for RELOAD bit field in SysTick Reload Value register; changed to R/W.
■ Clarification added as to what happens when the SSI in slave mode is required to transmit but there
is no data in the TX FIFO.
■ Corrected bit timing examples in CAN chapter.
■ Added "Hardware Configuration" section to Ethernet Controller chapter.
■ Additional minor data sheet clarifications and corrections.
4660January 2009
■ Revised High-Level Block Diagram.
■ Additional minor data sheet clarifications and corrections were made.
4283November 2008
19June 22, 2010
Texas Instruments-Production Data
Stellaris® LM3S8530 Microcontroller
