Table 8-1. GPIO Pad Configuration Examples
GPIO Register Bit Value
a
Configuration
SLRDR8RDR4RDR2RPDRPURDENODRDIRAFSEL
XXXX??1000Digital Input (GPIO)
??????1010Digital Output (GPIO)
????XX1110Open Drain Output
(GPIO)
????XX11X1Open Drain
Input/Output (I
2
C)
XXXX??10X1Digital Input (Timer
CCP)
??????10X1Digital Output (Timer
PWM)
??????10X1Digital Input/Output
(SSI)
??????10X1Digital Input/Output
(UART)
a. X=Ignored (don’t care bit)
?=Can be either 0 or 1, depending on the configuration
Table 8-2. GPIO Interrupt Configuration Example
Pin 2 Bit Value
a
Desired
Interrupt
Event
Trigger
Register
01234567
XX0XXXXX0=edge
1=level
GPIOIS
XX0XXXXX0=single
edge
1=both
edges
GPIOIBE
XX1XXXXX0=Low level,
or negative
edge
1=High level,
or positive
edge
GPIOIEV
001000000=masked
1=not
masked
GPIOIM
a. X=Ignored (don’t care bit)
8.3 Register Map
Table 8-3 on page 154 lists the GPIO registers. The offset listed is a hexadecimal increment to the
register’s address, relative to that GPIO port’s base address:
■ GPIO Port A: 0x4000.4000
■ GPIO Port B: 0x4000.5000
■ GPIO Port C: 0x4000.6000
153June 22, 2010
Texas Instruments-Production Data
Stellaris® LM3S8530 Microcontroller