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LM3S8530-IQR80-C1

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型号: LM3S8530-IQR80-C1
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  • LM3S8530-IQR80-C1 PDF文件
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功能描述: Stellaris® LM3S8530 Microcontroller
PDF文件大小: 4249.13 Kbytes
PDF页数: 共526页
制造商: TI[Texas Instruments]
制造商LOGO: TI[Texas Instruments] LOGO
制造商网址: http://www.ti.com
捡单宝LM3S8530-IQR80-C1
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120%
7.3.1.2 To perform an erase of a 1-KB page
1. Write the page address to the FMA register.
2. Write the flash write key and the ERASE bit (a value of 0xA442.0002) to the FMC register.
3. Poll the FMC register until the ERASE bit is cleared.
7.3.1.3 To perform a mass erase of the flash
1. Write the flash write key and the MERASE bit (a value of 0xA442.0004) to the FMC register.
2. Poll the FMC register until the MERASE bit is cleared.
7.3.2 Nonvolatile Register Programming
This section discusses how to update registers that are resident within the Flash memory itself.
These registers exist in a separate space from the main Flash memory array and are not affected
by an ERASE or MASS ERASE operation. The bits in these registers can be changed from 1 to 0
with a write operation. Prior to being committed, the register contents are unaffected by any reset
condition except power-on reset, which returns the register contents to the original value. By
committing the register values using the COMT bit in the FMC register, the register contents become
nonvolatile and are therefore retained following power cycling. Once the register contents are
committed, the contents are permanent, and they cannot be restored to their factory default values.
With the exception of the USER_DBG register, the settings in these registers can be tested before
committing them to Flash memory. For the USER_DBG register, the data to be written is loaded
into the FMD register before it is committed. The FMD register is read only and does not allow the
USER_DBG operation to be tried before committing it to nonvolatile memory.
Important: These registers can only have bits changed from 1 to 0 by user programming. Once
committed, these registers cannot be restored to their factory default values.
In addition, the USER_REG0, USER_REG1, USER_REG2, USER_REG3, and USER_DBG registers
each use bit 31 (NW) to indicate that they have not been committed and bits in the register may be
changed from 1 to 0. These five registers can only be committed once whereas the Flash memory
protection registers may be committed multiple times. Table 7-2 on page 127 provides the FMA
address required for commitment of each of the registers and the source of the data to be written
when the FMC register is written with a value of 0xA442.0008. After writing the COMT bit, the user
may poll the FMC register to wait for the commit operation to complete.
Table 7-2. User-Programmable Flash Memory Resident Registers
Data SourceFMA ValueRegister to be Committed
FMPRE00x0000.0000FMPRE0
FMPRE10x0000.0002FMPRE1
FMPPE00x0000.0001FMPPE0
FMPPE10x0000.0003FMPPE1
USER_REG00x8000.0000USER_REG0
USER_REG10x8000.0001USER_REG1
USER_REG20x8000.0002USER_REG2
USER_REG30x8000.0003USER_REG3
FMD0x7510.0000USER_DBG
127June 22, 2010
Texas Instruments-Production Data
Stellaris® LM3S8530 Microcontroller
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