Register 29: Software Reset Control 2 (SRCR2), offset 0x048
Writes to this register are masked by the bits in the Device Capabilities 4 (DC4) register.
Software Reset Control 2 (SRCR2)
Base 0x400F.E000
Offset 0x048
Type R/W, reset 0x00000000
16171819202122232425262728293031
reservedEMAC0
reserved
EPHY0
reserved
ROROROROROROROROROROROROR/WROR/WROType
0000000000000000Reset
0123456789101112131415
GPIOAGPIOBGPIOCGPIODGPIOEGPIOFGPIOGreserved
R/WR/WR/WR/WR/WR/WR/WROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved31
PHY0 Reset Control
Reset control for Ethernet PHY unit 0.
0R/WEPHY030
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved29
MAC0 Reset Control
Reset control for Ethernet MAC unit 0.
0R/WEMAC028
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved27:7
Port G Reset Control
Reset control for GPIO Port G.
0R/WGPIOG6
Port F Reset Control
Reset control for GPIO Port F.
0R/WGPIOF5
Port E Reset Control
Reset control for GPIO Port E.
0R/WGPIOE4
Port D Reset Control
Reset control for GPIO Port D.
0R/WGPIOD3
Port C Reset Control
Reset control for GPIO Port C.
0R/WGPIOC2
Port B Reset Control
Reset control for GPIO Port B.
0R/WGPIOB1
June 22, 2010122
Texas Instruments-Production Data
System Control