Table 23-3. JTAG Characteristics (continued)
UnitMaxNomMinParameter NameParameterParameter
No.
ns3523
-
TCK fall to Data Valid from High-Z, 2-mA drive
T
TDO_ZDV
J11
ns2615TCK fall to Data Valid from High-Z, 4-mA drive
ns2514TCK fall to Data Valid from High-Z, 8-mA drive
ns2918TCKfall to Data Valid from High-Z, 8-mA drive with
slew rate control
ns3521
-
TCK fall to Data Valid from Data Valid, 2-mA drive
T
TDO_DV
J12
ns2514TCK fall to Data Valid from Data Valid, 4-mA drive
ns2413TCK fall to Data Valid from Data Valid, 8-mA drive
ns2818TCK fall to Data Valid from Data Valid, 8-mA drive
with slew rate control
ns119
-
TCK fall to High-Z from Data Valid, 2-mA drive
T
TDO_DVZ
J13
ns97TCK fall to High-Z from Data Valid, 4-mA drive
ns86TCK fall to High-Z from Data Valid, 8-mA drive
ns97TCKfall to High-Z from Data Valid, 8-mA drive with
slew rate control
a. A ratio of at least 8:1 must be kept between the system clock and TCK.
Figure 23-2. JTAG Test Clock Input Timing
Figure 23-3. JTAG Test Access Port (TAP) Timing
TDO Output Valid
TCK
TDO Output Valid
J12
TDO
TDI
TMS
TDI Input Valid TDI Input Valid
J13
J9 J10
TMS Input Valid
J9 J10
TMS Input Valid
J11
J7 J8J8J7
983July 24, 2012
Texas Instruments-Production Data
Stellaris
®
LM3S6G65 Microcontroller
OBSOLETE: TI has discontinued production of this device.
