Table 21-9. Signals by Function, Except for GPIO (continued)
DescriptionBuffer Type
a
Pin TypePin NumberPin NameFunction
Ground reference for logic and I/O pins.Power-C4
H3
C5
J3
K6
K4
K5
L10
K10
F10
J10
F11
C8
C9
B6
F12
GND
Power
The ground reference for the analog circuits (ADC,
Analog Comparators, etc.). These are separated
from GND to minimize the electrical noise contained
on VDD from affecting the analog functions.
Power-A5
B5
GNDA
Low drop-out regulator output voltage. This pin
requires an external capacitor between the pin and
GND of 1 µF or greater. The LDO pin must also be
connected to the VDDC pins at the board level in
addition to the decoupling capacitor(s).
Power-E3LDO
Positive supply for I/O and some logic.Power-K7
G12
K8
C10
K9
H10
G10
E10
D10
D11
G11
VDD
The positive supply for the analog circuits (ADC,
Analog Comparators, etc.). These are separated
from VDD to minimize the electrical noise contained
on VDD from affecting the analog functions. VDDA
pins must be supplied with a voltage that meets the
specification in Table 23-2 on page 981 , regardless
of system implementation.
Power-C7
C6
VDDA
Positive supply for most of the logic function,
including the processor core and most peripherals.
The voltage on this pin is 1.3 V and is supplied by
the on-chip LDO. The VDDC pins should only be
connected to the LDOpin and an external capacitor
as specified in Table 23-6 on page 986 .
Power-F3
D3
G3
C3
VDDC
July 24, 2012972
Texas Instruments-Production Data
Signal Tables
OBSOLETE: TI has discontinued production of this device.