Table 21-3. Signals by Signal Name (continued)
DescriptionBuffer Type
a
Pin TypePin Mux / Pin
Assignment
Pin NumberPin Name
GPIO port E bit 4.TTLI/O-6PE4
GPIO port E bit 5.TTLI/O-5PE5
GPIO port E bit 6.TTLI/O-2PE6
GPIO port E bit 7.TTLI/O-1PE7
GPIO port F bit 0.TTLI/O-47PF0
GPIO port F bit 1.TTLI/O-61PF1
GPIO port F bit 2.TTLI/O-60PF2
GPIO port F bit 3.TTLI/O-59PF3
GPIO port G bit 0.TTLI/O-19PG0
GPIO port G bit 1.TTLI/O-18PG1
QEI module 0 phase A.TTLIPD1 (3)
PC4 (2)
PE2 (4)
11
25
74
PhA0
QEI module 1 phase A.TTLIPE3 (3)75PhA1
QEI module 0 phase B.TTLIPC7 (2)
PC6 (2)
PF0 (2)
PE3 (4)
22
23
47
75
PhB0
QEI module 1 phase B.TTLIPD1 (11)
PE2 (3)
11
74
PhB1
PWM 0. This signal is controlled by PWM Generator
0.
TTLOPD0 (1)
PG0 (2)
PA6 (4)
PF0 (3)
10
19
34
47
PWM0
PWM 1. This signal is controlled by PWM Generator
0.
TTLOPD1 (1)
PG1 (2)
PA7 (4)
PF1 (3)
11
18
35
61
PWM1
PWM 2. This signal is controlled by PWM Generator
1.
TTLOPD2 (3)
PF2 (4)
PB0 (2)
12
60
66
PWM2
PWM 3. This signal is controlled by PWM Generator
1.
TTLOPD3 (3)
PF3 (4)
PB1 (2)
13
59
67
PWM3
PWM 4. This signal is controlled by PWM Generator
2.
TTLOPE6 (1)
PG0 (4)
PA2 (4)
PA6 (5)
PF2 (2)
PE0 (1)
2
19
28
34
60
72
PWM4
PWM 5. This signal is controlled by PWM Generator
2.
TTLOPE7 (1)
PG1 (4)
PA3 (4)
PA7 (5)
PF3 (2)
PE1 (1)
1
18
29
35
59
73
PWM5
System reset input.TTLIfixed64RST
RXIN of the Ethernet PHY.AnalogIfixed37RXIN
RXIP of the Ethernet PHY.AnalogIfixed40RXIP
July 24, 2012938
Texas Instruments-Production Data
Signal Tables
OBSOLETE: TI has discontinued production of this device.